Datasheet LTC3703-5 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 60V Synchronous Switching Regulator Controller |
| Pages / Page | 32 / 7 — PI FU CTIO S (GN16/G28). MODE/SYNC (Pin 1/Pin 6):. GND (Pin 8/Pin 14):. … |
| File Format / Size | PDF / 386 Kb |
| Document Language | English |
PI FU CTIO S (GN16/G28). MODE/SYNC (Pin 1/Pin 6):. GND (Pin 8/Pin 14):. BGRTN (Pin 9/Pin 15):. BG (Pin 10/Pin 19):
Model Line for this Datasheet
Text Version of Document
LTC3703-5
U U U PI FU CTIO S (GN16/G28) MODE/SYNC (Pin 1/Pin 6):
Pulse Skip Mode Enable/Sync
GND (Pin 8/Pin 14):
Ground Pin. Pin. This multifunction pin provides Pulse Skip Mode en-
BGRTN (Pin 9/Pin 15):
Bottom Gate Return. This pin con- able/disable control and an external clock input for synchro- nects to the source of the pull-down MOSFET in the BG nization of the internal oscillator. Pulling this pin below 0.8V driver and is normally connected to ground. Connecting a or to an external logic-level synchronization signal disables negative supply to this pin allows the synchronous Pulse Skip Mode operation and forces continuous opera- MOSFET’s gate to be pulled below ground to help prevent tion. Pulling the pin above 0.8V enables Pulse Skip Mode false turn-on during high dV/dt transitions on the SW node. operation. This pin can also be connected to a feedback See the Applications Information section for more details. resistor divider from a secondary winding on the inductor to regulate a second output voltage.
BG (Pin 10/Pin 19):
Bottom Gate Drive. The BG pin drives the gate of the bottom N-channel synchronous switch
fSET (Pin 2/Pin 7):
Frequency Set. A resistor connected to MOSFET. This pin swings from BGRTN to DRV this pin sets the free running frequency of the internal os- CC. cillator. See applications section for resistor value selec-
DRVCC (Pin 11/Pin 20):
Driver Power Supply Pin. DRVCC tion details. provides power to the BG output driver. This pin should be connected to a voltage high enough to fully turn on the
COMP (Pin 3/Pin 8):
Loop Compensation. This pin is con- external MOSFETs, normally 4.5V to 15V for logic level nected directly to the output of the internal error amplifier. threshold MOSFETs. DRV An RC network is used at the COMP pin to compensate the CC should be bypassed to BGRTN with a 10µF, low ESR (X5R or better) ceramic capacitor. feedback loop for optimal transient response.
V FB (Pin 4/Pin 9):
Feedback Input. Connect FB through a
CC (Pin 12/Pin 21) :
Main Supply Pin. All internal circuits except the output drivers are powered from this pin. V resistor divider network to V CC OUT to set the output voltage. should be connected to a low noise power supply voltage Also connect the loop compensation network from COMP between 4.5V and 15V and should be bypassed to GND to FB. (Pin 8) with at least a 0.1µF capacitor in close proximity to
IMAX (Pin 5/Pin 10):
Current Limit Set. The IMAX pin sets the LTC3703-5. the current limit comparator threshold. If the voltage drop
SW (Pin 13/Pin 26):
Switch Node Connection to Inductor across the bottom MOSFET exceeds the magnitude of the and Bootstrap Capacitor. Voltage swing at this pin is from voltage at IMAX, the controller goes into current limit. The a Schottky diode (external) voltage drop below ground to IMAX pin has an internal 12µA current source, allowing the V current threshold to be set with a single external resistor IN. to ground. See the Current Limit Programming section for
TG (Pin 14/Pin 27):
Top Gate Drive. The TG pin drives the more information on choosing R gate of the top N-channel synchronous switch MOSFET. The IMAX. TG driver draws power from the BOOST pin and returns to
INV (Pin 6/Pin 11):
Top/Bottom Gate Invert. Pulling this pin the SW pin, providing true floating drive to the top MOSFET. above 2V sets the controller to operate in step-up (boost) mode with the TG output driving the synchronous MOSFET
BOOST (Pin 15/Pin 28):
Top Gate Driver Supply. The BOOST and the BG output driving the main switch. Below 1V, the pin supplies power to the floating TG driver. The BOOST pin controller will operate in step-down (buck) mode. should be bypassed to SW with a low ESR (X5R or better) 0.1µF ceramic capacitor. An additional fast recovery Schot-
RUN/SS (Pin 7/Pin 13):
Run/Soft-Start. Pulling RUN/SS be- tky diode from DRV low 0.9V will shut down the LTC3703-5, turn off both of the CC to BOOST will create a complete float- ing charge-pumped supply at BOOST. external MOSFET switches and reduce the quiescent sup- ply current to 25µA. A capacitor from RUN/SS to ground
VIN (Pin 16/Pin 1):
Input Voltage Sense Pin. This pin is con- will control the turn-on time and rate of rise of the output nected to the high voltage input of the regulator and is used voltage at power-up. An internal 4µA current source pull- by the internal feedforward compensation circuitry to im- up at the RUN/SS pin sets the turn-on time at approximately prove line regulation.
This is not a supply pin
. 750ms/µF. 37035fa 7
U U U PI FU CTIO S (GN16/G28) MODE/SYNC (Pin 1/Pin 6):
Pulse Skip Mode Enable/Sync
GND (Pin 8/Pin 14):
Ground Pin. Pin. This multifunction pin provides Pulse Skip Mode en-
BGRTN (Pin 9/Pin 15):
Bottom Gate Return. This pin con- able/disable control and an external clock input for synchro- nects to the source of the pull-down MOSFET in the BG nization of the internal oscillator. Pulling this pin below 0.8V driver and is normally connected to ground. Connecting a or to an external logic-level synchronization signal disables negative supply to this pin allows the synchronous Pulse Skip Mode operation and forces continuous opera- MOSFET’s gate to be pulled below ground to help prevent tion. Pulling the pin above 0.8V enables Pulse Skip Mode false turn-on during high dV/dt transitions on the SW node. operation. This pin can also be connected to a feedback See the Applications Information section for more details. resistor divider from a secondary winding on the inductor to regulate a second output voltage.
BG (Pin 10/Pin 19):
Bottom Gate Drive. The BG pin drives the gate of the bottom N-channel synchronous switch
fSET (Pin 2/Pin 7):
Frequency Set. A resistor connected to MOSFET. This pin swings from BGRTN to DRV this pin sets the free running frequency of the internal os- CC. cillator. See applications section for resistor value selec-
DRVCC (Pin 11/Pin 20):
Driver Power Supply Pin. DRVCC tion details. provides power to the BG output driver. This pin should be connected to a voltage high enough to fully turn on the
COMP (Pin 3/Pin 8):
Loop Compensation. This pin is con- external MOSFETs, normally 4.5V to 15V for logic level nected directly to the output of the internal error amplifier. threshold MOSFETs. DRV An RC network is used at the COMP pin to compensate the CC should be bypassed to BGRTN with a 10µF, low ESR (X5R or better) ceramic capacitor. feedback loop for optimal transient response.
V FB (Pin 4/Pin 9):
Feedback Input. Connect FB through a
CC (Pin 12/Pin 21) :
Main Supply Pin. All internal circuits except the output drivers are powered from this pin. V resistor divider network to V CC OUT to set the output voltage. should be connected to a low noise power supply voltage Also connect the loop compensation network from COMP between 4.5V and 15V and should be bypassed to GND to FB. (Pin 8) with at least a 0.1µF capacitor in close proximity to
IMAX (Pin 5/Pin 10):
Current Limit Set. The IMAX pin sets the LTC3703-5. the current limit comparator threshold. If the voltage drop
SW (Pin 13/Pin 26):
Switch Node Connection to Inductor across the bottom MOSFET exceeds the magnitude of the and Bootstrap Capacitor. Voltage swing at this pin is from voltage at IMAX, the controller goes into current limit. The a Schottky diode (external) voltage drop below ground to IMAX pin has an internal 12µA current source, allowing the V current threshold to be set with a single external resistor IN. to ground. See the Current Limit Programming section for
TG (Pin 14/Pin 27):
Top Gate Drive. The TG pin drives the more information on choosing R gate of the top N-channel synchronous switch MOSFET. The IMAX. TG driver draws power from the BOOST pin and returns to
INV (Pin 6/Pin 11):
Top/Bottom Gate Invert. Pulling this pin the SW pin, providing true floating drive to the top MOSFET. above 2V sets the controller to operate in step-up (boost) mode with the TG output driving the synchronous MOSFET
BOOST (Pin 15/Pin 28):
Top Gate Driver Supply. The BOOST and the BG output driving the main switch. Below 1V, the pin supplies power to the floating TG driver. The BOOST pin controller will operate in step-down (buck) mode. should be bypassed to SW with a low ESR (X5R or better) 0.1µF ceramic capacitor. An additional fast recovery Schot-
RUN/SS (Pin 7/Pin 13):
Run/Soft-Start. Pulling RUN/SS be- tky diode from DRV low 0.9V will shut down the LTC3703-5, turn off both of the CC to BOOST will create a complete float- ing charge-pumped supply at BOOST. external MOSFET switches and reduce the quiescent sup- ply current to 25µA. A capacitor from RUN/SS to ground
VIN (Pin 16/Pin 1):
Input Voltage Sense Pin. This pin is con- will control the turn-on time and rate of rise of the output nected to the high voltage input of the regulator and is used voltage at power-up. An internal 4µA current source pull- by the internal feedforward compensation circuitry to im- up at the RUN/SS pin sets the turn-on time at approximately prove line regulation.
This is not a supply pin
. 750ms/µF. 37035fa 7
