Datasheet LT3433 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | High Voltage Step-Up/Step-Down DC/DC Converter |
| Pages / Page | 16 / 6 — PI FU CTIO S. VFB (Pin 7):. SHDN (Pin 11):. BIAS (Pin 12):. VOUT (Pin … |
| File Format / Size | PDF / 244 Kb |
| Document Language | English |
PI FU CTIO S. VFB (Pin 7):. SHDN (Pin 11):. BIAS (Pin 12):. VOUT (Pin 13):. SS (Pin 10):. PWRGND (Pin 14):. SW_L (Pin 15):
Model Line for this Datasheet
Text Version of Document
LT3433
U U U PI FU CTIO S VFB (Pin 7):
Error Amplifier Inverting Input. The noninvert- The time from VSS = 0V to maximum available current can ing input of the error amplifier is connected to an internal be calculated given a capacitor CSS as: 1.231V reference. The VFB pin is connected to a resistor t divider from the converter output. Values for the resistor SS = (2.7 • 105)CSS or 0.27s/µF connected from V
SHDN (Pin 11):
Shutdown. If the SHDN pin is externally OUT to VFB (RFB1) and the resistor con- nected from V pulled below 0.5V, low current shutdown mode is initiated. FB to ground (RFB2) can be calculated to pro- gram converter output voltage (V During shutdown mode, all internal functions are disabled, OUT) via the following relation: and ICC is reduced to 10µA. This pin is intended to receive a digital input, however, there is a small amount of input VOUT = 1.231 • (RFB1 + RFB2)/RFB2 hysteresis built into the SHDN circuit to help assure glitch- The VFB pin input bias current is 35nA, so use of extremely free mode switching. If shutdown is not desired, connect high value feedback resistors could cause a converter the SHDN pin to VIN. output that is slightly higher than expected. Bias current
V
error at the output can be estimated as:
BIAS (Pin 12):
Internal Local Supply. Much of the LT3433 circuitry is powered from this supply, which is internally ∆VOUT(BIAS) = 35nA • RFB1 regulated to 2.5V through an on-board linear regulator. Current drive for this regulator is sourced from the V The voltage on V IN pin. FB also controls the LT3433 oscillator The V frequency through a “frequency-foldback” function. When BIAS supply is short-circuit protected to 5mA. the VFB pin voltage is below 0.8V, the oscillator runs slower The VBIAS supply only sources current, so forcing this pin than the 200kHz typical operating frequency. The oscilla- above the regulated voltage allows the use of external power tor frequency slows with reduced voltage on the pin, down for much of the LT3433 circuitry. When using external drive, to 50kHz when VFB = 0V. this pin should be driven above 3V to assure the internal supply is completely disabled. This pin is typically diode- The VFB pin voltage also controls switch current limit connected to the converter output to maximize conversion through a “current-limit foldback” function. At VFB = 0V, the efficiency. This pin must be bypassed with at least a 0.1µF maximum switch current is reduced to half of the normal ceramic capacitor to SGND. value. The current limit value increases linearly until VFB reaches 0.6V when the normal maximum switch current
VOUT (Pin 13):
Converter Output Pin. This pin voltage is level is restored. The frequency and current-limit foldback compared with the voltage on VIN internally to control functions add robustness to short-circuit protection and operation in single or 2-switch mode. When the ratios of help prevent inductor current runaway during start-up. the two voltages are such that a >75% duty cycle is required for regulation, the low side switch is enabled. Drive bias for
SS (Pin 10):
Soft Start. Connect a capacitor (CSS) from this the low side switch is also derived directly from this pin. pin to ground. The output voltage of the LT3433 error amplifier corresponds to the peak current sense amplifier
PWRGND (Pin 14):
High Current Ground Reference. This output detected before resetting the switch output(s). The is the current return for the low side switch and corresponds soft-start circuit forces the error amplifier output to a zero to the emitter of the low side switch transistor. peak current for start-up. A 5µA current is forced from the
SW_L (Pin 15):
Ground Referenced Switch Output. This pin SS pin onto an external capacitor. As the SS pin voltage is the collector of the low side switch transistor. The low ramps up, so does the LT3433 internally sensed peak cur- side switch shorts the SW_L pin to PWRGND when enabled. rent limit. This forces the converter output current to ramp The series impedance of the ground-referenced switch is from zero until normal output regulation is achieved. This 0.6Ω. function reduces output overshoot on converter start-up.
Exposed Pad (Pin 17):
Exposed Pad must be soldered to PCB ground for optimal thermal performance. 3433f 6
U U U PI FU CTIO S VFB (Pin 7):
Error Amplifier Inverting Input. The noninvert- The time from VSS = 0V to maximum available current can ing input of the error amplifier is connected to an internal be calculated given a capacitor CSS as: 1.231V reference. The VFB pin is connected to a resistor t divider from the converter output. Values for the resistor SS = (2.7 • 105)CSS or 0.27s/µF connected from V
SHDN (Pin 11):
Shutdown. If the SHDN pin is externally OUT to VFB (RFB1) and the resistor con- nected from V pulled below 0.5V, low current shutdown mode is initiated. FB to ground (RFB2) can be calculated to pro- gram converter output voltage (V During shutdown mode, all internal functions are disabled, OUT) via the following relation: and ICC is reduced to 10µA. This pin is intended to receive a digital input, however, there is a small amount of input VOUT = 1.231 • (RFB1 + RFB2)/RFB2 hysteresis built into the SHDN circuit to help assure glitch- The VFB pin input bias current is 35nA, so use of extremely free mode switching. If shutdown is not desired, connect high value feedback resistors could cause a converter the SHDN pin to VIN. output that is slightly higher than expected. Bias current
V
error at the output can be estimated as:
BIAS (Pin 12):
Internal Local Supply. Much of the LT3433 circuitry is powered from this supply, which is internally ∆VOUT(BIAS) = 35nA • RFB1 regulated to 2.5V through an on-board linear regulator. Current drive for this regulator is sourced from the V The voltage on V IN pin. FB also controls the LT3433 oscillator The V frequency through a “frequency-foldback” function. When BIAS supply is short-circuit protected to 5mA. the VFB pin voltage is below 0.8V, the oscillator runs slower The VBIAS supply only sources current, so forcing this pin than the 200kHz typical operating frequency. The oscilla- above the regulated voltage allows the use of external power tor frequency slows with reduced voltage on the pin, down for much of the LT3433 circuitry. When using external drive, to 50kHz when VFB = 0V. this pin should be driven above 3V to assure the internal supply is completely disabled. This pin is typically diode- The VFB pin voltage also controls switch current limit connected to the converter output to maximize conversion through a “current-limit foldback” function. At VFB = 0V, the efficiency. This pin must be bypassed with at least a 0.1µF maximum switch current is reduced to half of the normal ceramic capacitor to SGND. value. The current limit value increases linearly until VFB reaches 0.6V when the normal maximum switch current
VOUT (Pin 13):
Converter Output Pin. This pin voltage is level is restored. The frequency and current-limit foldback compared with the voltage on VIN internally to control functions add robustness to short-circuit protection and operation in single or 2-switch mode. When the ratios of help prevent inductor current runaway during start-up. the two voltages are such that a >75% duty cycle is required for regulation, the low side switch is enabled. Drive bias for
SS (Pin 10):
Soft Start. Connect a capacitor (CSS) from this the low side switch is also derived directly from this pin. pin to ground. The output voltage of the LT3433 error amplifier corresponds to the peak current sense amplifier
PWRGND (Pin 14):
High Current Ground Reference. This output detected before resetting the switch output(s). The is the current return for the low side switch and corresponds soft-start circuit forces the error amplifier output to a zero to the emitter of the low side switch transistor. peak current for start-up. A 5µA current is forced from the
SW_L (Pin 15):
Ground Referenced Switch Output. This pin SS pin onto an external capacitor. As the SS pin voltage is the collector of the low side switch transistor. The low ramps up, so does the LT3433 internally sensed peak cur- side switch shorts the SW_L pin to PWRGND when enabled. rent limit. This forces the converter output current to ramp The series impedance of the ground-referenced switch is from zero until normal output regulation is achieved. This 0.6Ω. function reduces output overshoot on converter start-up.
Exposed Pad (Pin 17):
Exposed Pad must be soldered to PCB ground for optimal thermal performance. 3433f 6
