Datasheet AD8369 (Analog Devices) - 6

AD8369 PIN CONFIGURATION INLO 1 16 INHI COMM 2 15 COMM BIT0 3 AD8369 14 PWUP TOP VIEW BIT1 4 13 VPOS (Not To Scale) BIT2 5 12 SENB BIT3 6 11 FILT DENB 7 10 CMDC OPLO 8 9 OPHI PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Function
1 INLO Balanced Differential Input. Internally biased, should be ac-coupled. 2 COMM Device Common. Connect to low impedance ground. 3 BIT0 Gain Selection Least Significant Bit. Used as DATA input signal when in serial mode of operation. 4 BIT1 Gain Selection Control Bit. Used as CLOCK input pin when in serial mode of operation. 5 BIT2 Gain Selection Control Bit. Inactive when in serial mode of operation. 6 BIT3 Gain Selection Most Significant Bit. Inactive when in serial mode of operation. 7 DENB Data Enable Pin. Writes data to register. See Timing Specifications for details. 8 OPLO Balanced Differential Output. Biased to midsupply, should be ac-coupled. 9 OPHI Balanced Differential Output. Biased to midsupply, should be ac-coupled. 10 CMDC Common-Mode Decoupling Pin. Connect bypass capacitor to ground for additional common-mode supply decoupling beyond the existing internal decoupling. 11 FILT High-Pass Filter Connection. Used to set high-pass corner frequency. 12 SENB Serial or Parallel Interface Select. Connect SENB to VPOS for serial operation. Connect SENB to COMM for parallel operation. 13 VPOS Positive Supply Voltage, VS = +3 V to +5.5 V. 14 PWUP Power-Up Pin. Connect PWUP to VPOS to power up the device. Connect PWUP to COMM to power-down. 15 COMM Device Common. Connect to a low impedance ground. 16 INHI Balanced Differential Input. Internally biased, should be ac-coupled. –6– REV. A Document Outline Features Applications Functional Block Diagram Product Description Specifications Timing Specifications Absolute Maximum Ratings Pin Configuration Typical Performance Characteristics Theroy of Operation Input Attentuator and Output 3 dB Step Fixed Gain Amplifier Input and Output Interfaces Noise and Distortion Offset Control Loop Digital Control Basic Connections Input-Output Interface Reducing Gain Sensitivity to Input and Output Impedance Variation Operation from a Single-Sided Source Interfacing to an ADC PCB Layout Considerations Evaluation Board Evaluation Board Software Appendix Characterization Equipment Definitions of Selected Parameters Composite Waveform Assumption Outline Dimensions Ordering Guide Revision History