Datasheet LT6556 (Analog Devices) - 9

LT6556
U U W U APPLICATIO S I FOR ATIO
To improve clamping, the pin’s DC impedance should be
Layout and Grounding
minimized by connecting the VREF pin directly to ground It is imperative that care is taken in PCB layout in order to in the symmetric dual supply case with a common mode benefi t from the very high speed and very low crosstalk of voltage of 0V. If the common mode voltage is not centered the LT6556. Separate power and ground planes are highly at ground or the input voltage exceeds plus or minus three recommended and trace lengths should be kept as short diodes from ground, an external resistor to either supply as possible. If input traces must be run over a distance of can be added to shift the VREF voltage to the desired level. several centimeters, they should use a controlled imped- The only way to cover the full input voltage range of V– + ance with either series or shunt terminations (nominally 1V to V+ – 1V is to shift VREF up or down. 50Ω or 75Ω) to maintain signal fi delity. The VREF pin can also be directly driven with a DC source. Care should be taken to minimize capacitance on the Figure 2 shows the effect of the clamp on input current LT6556’s output traces by increasing spacing between when sweeping input voltage with various VREF pin volt- traces and adjacent metal and by eliminating metal planes ages. Bypassing the VREF pin is not necessary. in underlying layers. To drive cable or traces longer than several centimeters, using the LT6555 with its fi xed gain 250 VREF = –2V of+2 in conjunction with series and load termination resis- 200 VREF = –1V tors may provide better results. 150 VREF = 0V VREF = 1V A) μ 100 VREF = 2V A plot of AC performance driving a 1k load with various 50 trace lengths is shown in Figure 3. All data is from a 4-layer 0 board with 2oz copper, 18mil of board layer thickness to –50 the ground plane, a trace width of 12mils and spacing to INPUT CURRENT ( –100 adjacent metal of 18mils. The 0.2cm output trace places –150 T the 1k resistor as close to the part as possible, while the –200 A = 25°C VS = ±5V other curves show the load resistor consecutively further –250–4 –3 –2 –1 0 1 2 3 4 away. The worst case, 4cm, trace has almost 10pF of INPUT VOLTAGE (V) parasitic capacitance. 6556 F02
Figure 2. Input Current vs Input Voltage
6 V
at Different V
S = ±5V
REF Voltages
VOUT = 200mVP-P 4 RL = 1k The inputs can be driven beyond the point at which the 4cm TRACE TA = 25°C output clips so long as input currents are limited to less 2 than ±10mA. Continuing to drive the input beyond the 2cm TRACE 0 output limit can result in increased current drive and 0.2cm TRACE slightly increased swing, but will also increase supply AMPLITUDE (dB) –2 current and may result in delays in transient response –4 at larger levels of overdrive. –60.1 1 10 100 1000 FREQUENCY (MHz) 6556 F03
Figure 3. Response vs Output Trace Length
6556f 9