Datasheet LT6554 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 650MHz Gain of 1 Triple Video Buffer |
| Pages / Page | 12 / 10 — TYPICAL APPLICATIO. RGB Buffer Demo Board. RGB Video Selector/Cable … |
| File Format / Size | PDF / 171 Kb |
| Document Language | English |
TYPICAL APPLICATIO. RGB Buffer Demo Board. RGB Video Selector/Cable Driver. Figure 4. DC794 Demo Board Schematic
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LT6554
U TYPICAL APPLICATIO RGB Buffer Demo Board
combined input and output of the other channels. This trace can be used for calibrating the effects of electrical The DC794 Demo Board illustrates optimal routing, delay and impedance mismatching and is not necessary bypassing and termination using the LT6554 as an in an end-user application. Jumpers and additional con- RGB video buffer. The schematic is shown in Figure 4. All nectors are also included to allow for evaluation of the inputs and outputs are routed to have a characteristic enable feature and single supply operation. impedance of 75Ω. The 75Ω input shunt and output series terminations are connected as close to the part as pos-
RGB Video Selector/Cable Driver
sible. While the 75Ω back termination resistors at the outputs of the LT6554 minimize signal reflections in the A video multiplexer can be implemented using the EN pins output traces and isolate the part from any capacitive of parallel LT6554s as shown in Figure 5. In this applica- loading in those traces, they also contribute to gain error tion, the corresponding outputs are connected together if the output is not terminated with high impedance. For and one LT6554 is switched on while the other is switched example, if the output is terminated with a 1k load, the 75Ω off. A fast inverter provides a complementary signal to back termination will cause a 7% gain error. Decreasing ensure that only one set of R, G and B channels is buffered the value of the back termination resistors will decrease at any time. the signal attenuation but may compromise the AC re- Since the output impedance of a disabled LT6554 is very sponse. However, connecting the LT6554 outputs to the high, adding additional channels will not resistively load output traces on the DC794 board without some series an enabled output. However, since the disabled LT6554 resistance is not recommended; 10Ω to 20Ω is generally has around 6pF of capacitance, it may be desirable to sufficient. resistively isolate the outputs of each channel to maintain A fourth signal trace is provided at the bottom of the flat frequency response as shown in the graph labeled DC794 demo board with dimensions identical to the “Maximum Capacitive Load vs Output Series Resistor” in the Typical Performance Characteristics section. E1 EN J1 50Ω BNC 1 JP1 EN CONTROL V+ 1 3 2 ENABLE EXT 5 4 3 2 V+ C1 C2 C3 C4 J2 JP2 4700pF 470pF 4700pF 10µF, 16V BANANA DGND 1210 JACK 1 3 LT6554 2 E2 1 16 EN V+ AGND FLOAT DGND 2 15 R1 BNC × 3 DGND V+ BNC x3 5 5 1 Z = 75 3 14 75Ω Z = 75 1 INR 4 4 INR OUTR OUTR 3 3 4 13 2 J5 R2 AGND V– J9 2 5 Z = 75 5 12 75Ω Z = 75 5 1 ING OUTG 1 ING 4 4 OUTG 3 6 11 R3 3 AGND V+ 2 J6 J10 2 Z = 75 7 10 75Ω Z = 75 5 INB OUTB 5 1 1 INB 4 4 R4 R5 R6 8 9 OUTB V– V– 3 3 75Ω 75Ω 75Ω 2 J7 J11 2 V– E3 AGND V– J4 SINGLE DUAL C5 C6 C7 C8 C9 BANANA JACK 1 2 3 470pF 1000pF 470pF 4700pF 10µF, 16V AGND 1210 J3 JP3 BANANA SUPPLY 5 JACK 5 1 Z = 75 1 CAL 4 4 CAL 3 3 2 J8 ALL BNC: CANARE BCJ-BPLH J12 2 BNC BNC
Figure 4. DC794 Demo Board Schematic
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U TYPICAL APPLICATIO RGB Buffer Demo Board
combined input and output of the other channels. This trace can be used for calibrating the effects of electrical The DC794 Demo Board illustrates optimal routing, delay and impedance mismatching and is not necessary bypassing and termination using the LT6554 as an in an end-user application. Jumpers and additional con- RGB video buffer. The schematic is shown in Figure 4. All nectors are also included to allow for evaluation of the inputs and outputs are routed to have a characteristic enable feature and single supply operation. impedance of 75Ω. The 75Ω input shunt and output series terminations are connected as close to the part as pos-
RGB Video Selector/Cable Driver
sible. While the 75Ω back termination resistors at the outputs of the LT6554 minimize signal reflections in the A video multiplexer can be implemented using the EN pins output traces and isolate the part from any capacitive of parallel LT6554s as shown in Figure 5. In this applica- loading in those traces, they also contribute to gain error tion, the corresponding outputs are connected together if the output is not terminated with high impedance. For and one LT6554 is switched on while the other is switched example, if the output is terminated with a 1k load, the 75Ω off. A fast inverter provides a complementary signal to back termination will cause a 7% gain error. Decreasing ensure that only one set of R, G and B channels is buffered the value of the back termination resistors will decrease at any time. the signal attenuation but may compromise the AC re- Since the output impedance of a disabled LT6554 is very sponse. However, connecting the LT6554 outputs to the high, adding additional channels will not resistively load output traces on the DC794 board without some series an enabled output. However, since the disabled LT6554 resistance is not recommended; 10Ω to 20Ω is generally has around 6pF of capacitance, it may be desirable to sufficient. resistively isolate the outputs of each channel to maintain A fourth signal trace is provided at the bottom of the flat frequency response as shown in the graph labeled DC794 demo board with dimensions identical to the “Maximum Capacitive Load vs Output Series Resistor” in the Typical Performance Characteristics section. E1 EN J1 50Ω BNC 1 JP1 EN CONTROL V+ 1 3 2 ENABLE EXT 5 4 3 2 V+ C1 C2 C3 C4 J2 JP2 4700pF 470pF 4700pF 10µF, 16V BANANA DGND 1210 JACK 1 3 LT6554 2 E2 1 16 EN V+ AGND FLOAT DGND 2 15 R1 BNC × 3 DGND V+ BNC x3 5 5 1 Z = 75 3 14 75Ω Z = 75 1 INR 4 4 INR OUTR OUTR 3 3 4 13 2 J5 R2 AGND V– J9 2 5 Z = 75 5 12 75Ω Z = 75 5 1 ING OUTG 1 ING 4 4 OUTG 3 6 11 R3 3 AGND V+ 2 J6 J10 2 Z = 75 7 10 75Ω Z = 75 5 INB OUTB 5 1 1 INB 4 4 R4 R5 R6 8 9 OUTB V– V– 3 3 75Ω 75Ω 75Ω 2 J7 J11 2 V– E3 AGND V– J4 SINGLE DUAL C5 C6 C7 C8 C9 BANANA JACK 1 2 3 470pF 1000pF 470pF 4700pF 10µF, 16V AGND 1210 J3 JP3 BANANA SUPPLY 5 JACK 5 1 Z = 75 1 CAL 4 4 CAL 3 3 2 J8 ALL BNC: CANARE BCJ-BPLH J12 2 BNC BNC
Figure 4. DC794 Demo Board Schematic
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