Datasheet LT6558 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 550MHz, 2200V/µs Gain of 1, Single Supply Triple Video Amplifier with Input Bias Control |
| Pages / Page | 12 / 8 — PIN FUNCTIONS V+ B (Pin 9):. OUT R (Pin 14):. V+ (Pin 15):. OUT B (Pin … |
| File Format / Size | PDF / 215 Kb |
| Document Language | English |
PIN FUNCTIONS V+ B (Pin 9):. OUT R (Pin 14):. V+ (Pin 15):. OUT B (Pin 10):. V+ G (Pin 11):. BCV (Pin 16):. OUT G (Pin 12):
Model Line for this Datasheet
Text Version of Document
LT6558
PIN FUNCTIONS V+ B (Pin 9):
Positive Supply Voltage of Blue Channel the supply voltage bus with proper bypassing. For best Amplifi er. This pin is not internally connected to other performance, see Power Supply Considerations. supply voltage pins and must be externally connected to
OUT R (Pin 14):
Red Channel Output. the supply voltage bus with proper bypassing. For best performance, see Power Supply Considerations.
V+ (Pin 15):
Positive Supply Voltage of Control Circuitry. This pin is not internally connected to other supply voltage
OUT B (Pin 10):
Blue Channel Output. pins and must be externally connected to supply voltage
V+ G (Pin 11):
Positive Supply Voltage of Green Channel bus with proper bypassing. For best performance, see Amplifi er. This pin is not internally connected to other Power Supply Considerations. supply voltage pins and must be externally connected to
BCV (Pin 16):
Bias Control Voltage. A resistor connected the supply voltage bus with proper bypassing. For best between Pin 16 and Pin 2 (GND) will generate a DC voltage performance, see Power Supply Considerations. bias at the inputs of the three amplifi ers for AC coupling
OUT G (Pin 12):
Green Channel Output. application, see Programmable Input Bias.
V+ R (Pin 13):
Positive Supply Voltage of Red Channel
Exposed Pad (Pin 17, DFN Package):
Ground. This pad Amplifi er. This pin is not internally connected to other must be soldered to PCB and is internally connected to supply voltage pins and must be externally connected to GND (Pin 2).
APPLICATIONS INFORMATION Power Supply Considerations
The grounds are separately pinned for each amplifi er to minimize crosstalk. The LT6558 is optimized to provide full video signal swing output when operated from a standard 5V single supply. Operation from split supplies can be accomplished by Due to the supply current involved in ultrahigh slew rate connecting the LT6558 ground pins to the negative rail. amplifi ers like the LT6558, selection of the lowest workable With dual supplies, recommended voltages range from supply voltage is recommended to minimize heat genera- nominal ±2.5V to ±3.3V. tion and simplify thermal management. Temperature rise The ultrahigh frequency (UHF) operating range of the at the internal devices (TJ) must be kept below 150°C LT6558 requires that careful printed circuit layout prac- (SSOP package) or 125°C (DFN package), and can be tices be followed to obtain maximum performance. Trace estimated from the ambient temperature (TA) and power lengths between power pins and bypass capacitors should dissipation (PD) as follows: be minimized (<0.1 inch) and one or more dedicated TJ = TA + PD • 40°C/W for DFN package ground planes should be employed to minimize parasitic inductance. Poor layout or breadboarding methods can or seriously impact amplifi er stability, frequency response TJ = TA + PD • 110°C/W for SSOP package and crosstalk performance. A 2.2µF and a 10µF bypass where P capacitor is recommended for the LT6558 supply bus, D = (IS + 0.5 • IO) • VS(TOTAL) plus a 10nF high frequency bypass capacitor at each The latter equation assumes (conservatively) that the output individual power pin. swing is small relative to the supply and RMS load current (IO) is bidirectional (as with AC coupling). 6558f 8
PIN FUNCTIONS V+ B (Pin 9):
Positive Supply Voltage of Blue Channel the supply voltage bus with proper bypassing. For best Amplifi er. This pin is not internally connected to other performance, see Power Supply Considerations. supply voltage pins and must be externally connected to
OUT R (Pin 14):
Red Channel Output. the supply voltage bus with proper bypassing. For best performance, see Power Supply Considerations.
V+ (Pin 15):
Positive Supply Voltage of Control Circuitry. This pin is not internally connected to other supply voltage
OUT B (Pin 10):
Blue Channel Output. pins and must be externally connected to supply voltage
V+ G (Pin 11):
Positive Supply Voltage of Green Channel bus with proper bypassing. For best performance, see Amplifi er. This pin is not internally connected to other Power Supply Considerations. supply voltage pins and must be externally connected to
BCV (Pin 16):
Bias Control Voltage. A resistor connected the supply voltage bus with proper bypassing. For best between Pin 16 and Pin 2 (GND) will generate a DC voltage performance, see Power Supply Considerations. bias at the inputs of the three amplifi ers for AC coupling
OUT G (Pin 12):
Green Channel Output. application, see Programmable Input Bias.
V+ R (Pin 13):
Positive Supply Voltage of Red Channel
Exposed Pad (Pin 17, DFN Package):
Ground. This pad Amplifi er. This pin is not internally connected to other must be soldered to PCB and is internally connected to supply voltage pins and must be externally connected to GND (Pin 2).
APPLICATIONS INFORMATION Power Supply Considerations
The grounds are separately pinned for each amplifi er to minimize crosstalk. The LT6558 is optimized to provide full video signal swing output when operated from a standard 5V single supply. Operation from split supplies can be accomplished by Due to the supply current involved in ultrahigh slew rate connecting the LT6558 ground pins to the negative rail. amplifi ers like the LT6558, selection of the lowest workable With dual supplies, recommended voltages range from supply voltage is recommended to minimize heat genera- nominal ±2.5V to ±3.3V. tion and simplify thermal management. Temperature rise The ultrahigh frequency (UHF) operating range of the at the internal devices (TJ) must be kept below 150°C LT6558 requires that careful printed circuit layout prac- (SSOP package) or 125°C (DFN package), and can be tices be followed to obtain maximum performance. Trace estimated from the ambient temperature (TA) and power lengths between power pins and bypass capacitors should dissipation (PD) as follows: be minimized (<0.1 inch) and one or more dedicated TJ = TA + PD • 40°C/W for DFN package ground planes should be employed to minimize parasitic inductance. Poor layout or breadboarding methods can or seriously impact amplifi er stability, frequency response TJ = TA + PD • 110°C/W for SSOP package and crosstalk performance. A 2.2µF and a 10µF bypass where P capacitor is recommended for the LT6558 supply bus, D = (IS + 0.5 • IO) • VS(TOTAL) plus a 10nF high frequency bypass capacitor at each The latter equation assumes (conservatively) that the output individual power pin. swing is small relative to the supply and RMS load current (IO) is bidirectional (as with AC coupling). 6558f 8
