Datasheet ADP2114 (Analog Devices)

Configurable, Dual 2 A/Single 4 A, Synchronous Step-Down DC-to-DC Regulator Data Sheet ADP2114 FEATURES TYPICAL APPLICATION CIRCUIT Configurable 2 A/2 A or 3 A/1 A dual output load VIN = 5V combinations or 4 A combined single output 10Ω High efficiency: up to 95% 1µF 100kΩ 100kΩ Input voltage VIN: 2.75 V to 5.5 V EN2 EN1 VIN4 VDD VIN1 Selectable fixed output: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V or 22µF 22µF VIN5 VIN2 adjustable output voltage to 0.6 V minimum VIN6 VIN3 PGOOD2 PGOOD1 ±1.5% accurate reference voltage PGOOD2 PGOOD1 4.7µH VOUT1 = 3.3V, 2A VOUT2 = 1.8V, 2A 2.2µH SW1 Selectable switching frequency: 300 kHz, 600 kHz, 1.2 MHz SW3 ADP2114 SW2 SW4 or synchronized from 200 kHz to 2 MHz PGND1 47µF 22µF 47µF PGND3 PGND2 Optimized gate slew rate for reduced EMI PGND4 FB1 External synchronization input or internal clock output FB2 47kΩ V2SET V1SET Dual-phase, 180° phase shifted PWM channels 15kΩ SYNC SYNC/CLKOUT Current mode for fast transient response COMP2 G COMP1 22kΩ Q F G SS2 10nF E C F D SS1 22kΩ Pulse skip under light load or forced PWM operation 10nF 1.2nF FR OP SC GN Input undervoltage lockout (UVLO) 1.2nF Independent enable inputs and PGOOD outputs 8.2kΩ
01 -0
Overcurrent and thermal overload protection
3
f
14
SW = 600kHz
08
Externally programmable soft start
Figure 1.
32-lead 5 mm × 5 mm LFCSP package Supported by ADIsimPower™ design t ool APPLICATIONS Point of load regulation Telecommunications and networking systems Consumer electronics
out-of-phase output clock, providing the possibility for a
Industrial and instrumentation
stackable multiphase power solution.
Medical
The ADP2114 input voltage range is from 2.75 V to 5.5 V, and it
GENERAL DESCRIPTION
converts to fixed outputs of 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, or The ADP2114 is a versatile, synchronous step-down, switching 3.3 V that can be set independently for each channel using regulator that satisfies a wide range of customer point-of-load external resistors. Using a resistor divider, it is also possible to requirements. The two PWM channels can be configured to set the output voltage as low as 0.6 V. The ADP2114 operates deliver independent outputs at 2 A and 2 A (or 3 A/1 A) or can be over the −40°C to +125°C junction temperature range. configured as a single interleaved output capable of delivering 4 A.
100 V
The two PWM channels are 180º phase shifted to reduce input
IN = 3.3V; VOUT = 1.8V VIN = 5.0V; VOUT = 3.3V
ripple current and to reduce input capacitance. The ADP2114
95
provides high efficiency and operates at switching frequencies of
) 90
up to 2 MHz. At light loads, the ADP2114 can be set to operate
% (
in pulse skip mode for higher efficiency or in forced PWM mode
NCY 85 E
to reduce EMI.
ICI F F E
The ADP2114 is designed with an optimized gate slew rate to
80 V
reduce EMI emissions, allowing it to power sensitive, high
IN = 5.0V; VOUT = 1.8V 75
performance signal chain circuits. The switching frequency can be set to 300 kHz, 600 kHz, or 1.2 MHz and can be synchronized
70
to an external clock that minimizes the system noise. The
0.01 0.1 1 3
02 0
LOAD CURRENT (A)
bidirectional synchronization pin is also configurable as a 90 08143- Figure 2. Typical Efficiency vs. Load Current
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS SUPPLY CURRENT LOAD TRANSIENT RESPONSE BODE PLOTS SIMPLIFIED BLOCK DIAGRAM THEORY OF OPERATION ADIsimPower DESIGN TOOL CONTROL ARCHITECTURE UNDERVOLTAGE LOCKOUT (UVLO) ENABLE/DISABLE CONTROL SOFT START POWER GOOD PULSE SKIP MODE HICCUP MODE CURRENT LIMIT THERMAL OVERLOAD PROTECTION MAXIMUM DUTY CYCLE OPERATION SYNCHRONIZATION CONVERTER CONFIGURATION SELECTING THE OUTPUT VOLTAGE SETTING THE OSCILLATOR FREQUENCY SYNCHRONIZATION AND CLKOUT OPERATION MODE CONFIGURATION EXTERNAL COMPONENTS SELECTION INPUT CAPACITOR SELECTION VDD RC FILTER INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION CONTROL LOOP COMPENSATION DESIGN EXAMPLE CHANNEL 1 CONFIGURATION AND COMPONENTS SELECTION CHANNEL 2 CONFIGURATION AND COMPONENTS SELECTION SYSTEM CONFIGURATION APPLICATION CIRCUITS POWER DISSIPATION, THERMAL CONSIDERATIONS CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE