Datasheet ADP5014 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Integrated Power Solution with Quad Low Noise Buck Regulators |
| Pages / Page | 34 / 8 — ADP5014. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 4 3. 2 … |
| Revision | A |
| File Format / Size | PDF / 656 Kb |
| Document Language | English |
ADP5014. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 4 3. 2 1. P 1. ET ET E ET ET. IN 1 M IN
Text Version of Document
ADP5014 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 4 3 2 1 1 F P 1 ET ET E ET ET IN 1 M IN VS VS VR VS VS RT AV FB CO PV 0 9 8 7 6 5 4 3 4 3 3 3 3 3 3 3 23 13 FB3 1 30 PVIN1 COMP3 2 29 SW1 PVIN3 3 28 SW1 SW3 4 27 PGND1 PGND3 5 ADP5014 26 PGND1 PGND4 6 TOP VIEW 25 PGND2 SW4 7 (Not to Scale) 24 PGND2 PVIN4 8 23 SW2 COMP4 9 22 SW2 FB4 10 21 PVIN2 11 21 31 4 5 1 1 6 7 1 1 81 91 02 O 2 1 2 2 2 34 V 12 L PI L G G L L P N FB G D 3/U A M CF CF D 4/ 2/ PVI N EN N CO E E 1/ENEN NOTES 1. EXPOSED PAD. THE EXPOSED PAD MUST BE
003
CONNECTED AND SOLDERED TO AN EXTERNAL
96-
GROUND PLANE.
54 1 Figure 3. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 FB3 Feedback Sensing Input for Channel 3. 2 COMP3 Error Amplifier Output for Channel 3. Connect a resistor capacitor (RC) network from this pin to ground. 3 PVIN3 Power Input for Channel 3. 4 SW3 Switching Node Output for Channel 3. 5 PGND3 Power Ground for Channel 3 6 PGND4 Power Ground for Channel 4. 7 SW4 Switching Node Output for Channel 4. 8 PVIN4 Power Input for Channel 4. 9 COMP4 Error Amplifier Output for Channel 4. Connect an RC network from this pin to ground. 10 FB4 Feedback Sensing Input for Channel 4. 11 GPIO General-Purpose Input or Output Signal. This pin can be configured as power good, synchronization clock output (CLK-OUT) or undervoltage comparator output (UVO). 12 EN4/DL34 Enable Input for Channel 4 in Manual Mode (EN4). Delay Timer Setting for Channel 3 and Channel 4 in Sequence Mode (DL34). Connect one resistor from this pin to ground to program the start-up and shutdown sequence delay timer for Channel 3 and Channel 4. 13 EN3/UV Enable Input for Channel 3 in Manual Mode (EN3). Under Voltage Comparator Input in Sequence Mode (UV). 14 CFG2 System Configuration Pin 1. Connect one resistor from this pin to ground to program sequence or manual mode, the delay timer, PSM or FPWM operation mode, and GPIO mapping for all channels. 15 CFG1 System Configuration Pin 2. Connect one resistor from this pin to ground to program current limit, and the parallel output for all channels. 16 EN2/DL12 Enable Input for Channel 2 in Manual Mode (EN2). Delay Timer Setting for Channel 1 and Channel 2 in Sequence Mode (DL12). Connect one resistor from this pin to ground to program the start-up and shutdown sequence delay timer for Channel 1 and Channel 2. 17 EN1/ENALL Enable Input for Channel 1 in Manual Mode (EN1). Grouped Enable Input for All Channels in Sequence Mode (ENALL). 18 FB2 Feedback Sensing Input for Channel 2. 19 COMP2 Error Amplifier Output for Channel 2. Connect an RC network from this pin to ground. 20, 21 PVIN2 Power Input for Channel 2. 22, 23 SW2 Switching Node Output for Channel 2. 24, 25 PGND2 Power Ground for Channel 2. 26, 27 PGND1 Power Ground for Channel 1. 28, 29 SW1 Switching Node Output for Channel 1. Rev. 0 | Page 8 of 34 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode FPWM and Automatic PWM/PSM Modes LOW NOISE ARCHITECTURE INTERNAL REFERENCE (VREF) ADJUSTABLE OUTPUT VOLTAGE FUNCTION CONFIGURATIONS (CFG1 AND CFG2) PARALLEL OPERATION MANUAL/SEQUENCE MODE Manual Mode (Precision Enable) Sequence Mode GENERAL PURPOSE INPUT/OUTPUT (GPIO) OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT POWER-GOOD FUNCTION UV COMPARATOR (SEQUENCE MODE ONLY) SOFT START STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLD BACK SHORT-CIRCUIT PROTECTION (SCP) OVERVOLTAGE PROTECTION UNDERVOLTAGE LOCKOUT ACTIVE OUTPUT DISCHARGE SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CONFIGUATIONS (CFG1 AND CFG2) SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR DESIGNING THE COMPENSATION NETWORK PCB LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
003
CONNECTED AND SOLDERED TO AN EXTERNAL
96-
GROUND PLANE.
54 1 Figure 3. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 FB3 Feedback Sensing Input for Channel 3. 2 COMP3 Error Amplifier Output for Channel 3. Connect a resistor capacitor (RC) network from this pin to ground. 3 PVIN3 Power Input for Channel 3. 4 SW3 Switching Node Output for Channel 3. 5 PGND3 Power Ground for Channel 3 6 PGND4 Power Ground for Channel 4. 7 SW4 Switching Node Output for Channel 4. 8 PVIN4 Power Input for Channel 4. 9 COMP4 Error Amplifier Output for Channel 4. Connect an RC network from this pin to ground. 10 FB4 Feedback Sensing Input for Channel 4. 11 GPIO General-Purpose Input or Output Signal. This pin can be configured as power good, synchronization clock output (CLK-OUT) or undervoltage comparator output (UVO). 12 EN4/DL34 Enable Input for Channel 4 in Manual Mode (EN4). Delay Timer Setting for Channel 3 and Channel 4 in Sequence Mode (DL34). Connect one resistor from this pin to ground to program the start-up and shutdown sequence delay timer for Channel 3 and Channel 4. 13 EN3/UV Enable Input for Channel 3 in Manual Mode (EN3). Under Voltage Comparator Input in Sequence Mode (UV). 14 CFG2 System Configuration Pin 1. Connect one resistor from this pin to ground to program sequence or manual mode, the delay timer, PSM or FPWM operation mode, and GPIO mapping for all channels. 15 CFG1 System Configuration Pin 2. Connect one resistor from this pin to ground to program current limit, and the parallel output for all channels. 16 EN2/DL12 Enable Input for Channel 2 in Manual Mode (EN2). Delay Timer Setting for Channel 1 and Channel 2 in Sequence Mode (DL12). Connect one resistor from this pin to ground to program the start-up and shutdown sequence delay timer for Channel 1 and Channel 2. 17 EN1/ENALL Enable Input for Channel 1 in Manual Mode (EN1). Grouped Enable Input for All Channels in Sequence Mode (ENALL). 18 FB2 Feedback Sensing Input for Channel 2. 19 COMP2 Error Amplifier Output for Channel 2. Connect an RC network from this pin to ground. 20, 21 PVIN2 Power Input for Channel 2. 22, 23 SW2 Switching Node Output for Channel 2. 24, 25 PGND2 Power Ground for Channel 2. 26, 27 PGND1 Power Ground for Channel 1. 28, 29 SW1 Switching Node Output for Channel 1. Rev. 0 | Page 8 of 34 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode FPWM and Automatic PWM/PSM Modes LOW NOISE ARCHITECTURE INTERNAL REFERENCE (VREF) ADJUSTABLE OUTPUT VOLTAGE FUNCTION CONFIGURATIONS (CFG1 AND CFG2) PARALLEL OPERATION MANUAL/SEQUENCE MODE Manual Mode (Precision Enable) Sequence Mode GENERAL PURPOSE INPUT/OUTPUT (GPIO) OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT POWER-GOOD FUNCTION UV COMPARATOR (SEQUENCE MODE ONLY) SOFT START STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLD BACK SHORT-CIRCUIT PROTECTION (SCP) OVERVOLTAGE PROTECTION UNDERVOLTAGE LOCKOUT ACTIVE OUTPUT DISCHARGE SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CONFIGUATIONS (CFG1 AND CFG2) SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR DESIGNING THE COMPENSATION NETWORK PCB LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
