Datasheet ADP2230 (Analog Devices) - 5

Data Sheet ADP2230 ABSOLUTE MAXIMUM RATINGS Table 3.
The specified values of θJA are based on a 4-layer, 4 in. × 3 in. circuit board. See JEDEC JESD51-7, High Effective Thermal
Parameter Rating
Conductivity Test Board for Leaded Surface Mount Packages, for VINx, FBx, EN2, SYNC to AGND, PGND −0.3 V to +7 V detailed information on board construction. For more EN1 −0.3 V to +6 V information, see AN-772 Application Note, A Design and SWx to AGND, PGND −0.3 V to VINx Manufacturing Guide for the Lead Frame Chip Scale Package Operating Ambient Temperature Range −40°C to +85°C (LFCSP). Operating Junction Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C ΨJB is the junction-to-board thermal characterization parameter Soldering Conditions JEDEC J-STD-020 with units of °C/W. The ΨJB of the package is based on modeling and calculation using a 4-layer board. The JESD51-12, Stresses at or above those listed under Absolute Maximum Guidelines for Reporting and Using Electronic Package Thermal Ratings may cause permanent damage to the product. This is a Information, states that thermal characterization parameters are stress rating only; functional operation of the product at these not the same as thermal resistances. Ψ or any other conditions above those indicated in the operational JB measures the component power flowing through multiple thermal paths section of this specification is not implied. Operation beyond rather than a single path as in junction-to-board thermal the maximum operating conditions for extended periods may resistance (θ affect product reliability. JB). Therefore, ΨJB thermal paths include convection from the top of the package as well as radiation from the Absolute maximum ratings apply individually only, not in package, factors that make ΨJB more useful in real-world combination. applications. Maximum TJ is calculated from the board
THERMAL DATA
temperature (TB) and PD using the formula Exceeding the junction temperature (T T J) limit can cause damage J = TB + (PD × ΨJB) (2) to the ADP2230. Monitoring ambient temperature does not For more information regarding ΨJB, see JESD51-12 and guarantee that TJ is within the specified temperature limits. The JESD51-8, Integrated Circuit Thermal Test Method maximum ambient temperature may require derating in Environmental Conditions—Junction-to-Board. applications with high power dissipation and poor thermal
THERMAL RESISTANCE
resistance. θ In applications with moderate power dissipation and low JA and ΨJB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. printed circuit board (PCB) thermal resistance, the maximum θ ambient temperature can exceed the maximum limit as long as JC is a parameter for surface-mount packages with top mounted heat sinks. the junction temperature is within specification limits. The junction temperature of the device is dependent on the ambient
Table 4. Thermal Resistance
temperature, the power dissipation of the device, and the
Package Type θJA θJC Unit
junction-to-ambient thermal resistance (θJA) of the package. 10-Lead, 3 mm × 3mm LFCSP 44.6 5.45 °C/W Maximum TJ is calculated from the ambient temperature (TA) and power dissipation (PD) using the formula
ESD CAUTION
TJ = TA + (PD × θJA) (1) θJA of the package is based on modeling and calculation using a 4-layer board. θJA is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of θ JA can vary, depending on PCB material, layout, and environmental conditions. Rev. A | Page 5 of 18 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED COMPONENT SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION OVERVIEW OPERATING CONDITIONS Input Voltage Output Voltage SYNC PIN CONTROL SCHEMES PWM Mode PSM/PWM Automatic Transitioning Mode External Clock Synchronization FEATURES DESCRIPTIONS Precision Enable Quick Output Discharge Output Short-Circuit Protection Undervoltage Lockout Thermal Shutdown Soft Start Current Limit 100% Duty Cycle APPLICATIONS INFORMATION SETTING THE OUTPUT VOLTAGE SELECTING THE INDUCTOR SELECTING THE INPUT AND OUTPUT CAPACITORS Input Capacitor Output Capacitor PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE