Datasheet ADP2165, ADP2166 (Analog Devices) - 7

Data Sheet ADP2165/ADP2166 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS N N N N EG I VR EN AV PVI PVI PVI 24 23 22 21 20 19 SYNC 1 18 PVIN RT 2 17 SW ADP2165/ TRK 3 16 SW ADP2166 SS 4 TOP VIEW 15 SW (Not to Scale) COMP 5 14 SW FB 6 13 PGND 7 8 9 10 11 12 T ND ND ND ND BS G G G G GOOD P P P P NOTES 1. EXPOSED PAD. SOLDER THE EXPOSED PAD TO AN EXTERNAL GROUND PLANE
003
UNDERNEATH THE IC FOR THERMAL DISSIPATION.
10956- Figure 4. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 SYNC Synchronization Input. Connect this pin to an external clock between 250 kHz and 1.4 MHz to synchronize the switching frequency to the external clock. RT can be used to program the phase shift when synchronizing the external clock. 2 RT Frequency Setting. Connect a resistor between the RT and GND pins to program the switching frequency between 250 kHz to 1.4 MHz. When the RT pin is floating, the frequency is set to 620 kHz, and when the RT pin is connected to VREG, the frequency is set to 1.2 MHz. 3 TRK Tracking Input. This pin can be used for tracking and sequencing. If the tracking function is not used, connect TRK to VREG. 4 SS Soft Start Control. Connect a capacitor from the SS pin to the GND pin to program the soft start time. 5 COMP Error Amplifier Output. Connect a compensation network from the COMP pin to the GND pin. 6 FB Feedback Voltage Sense Input. Connect to a resistor divider from VOUT. 7 GND Analog Ground. Connect to the ground plane. 8 PGOOD Power-Good Output (Open-Drain). A pull-up resistor of 100 kΩ is recommended. 9 BST Supply Rail for the High-Side MOSFET Gate Drive. Place a 0.1 µF capacitor between the SW pin and the BST pin. 10, 11, PGND Power Ground. Connect this pin to the ground plane and to the output return side of the output capacitor. 12, 13 14, 15, SW Switching Node. 16, 17 18, 19, PVIN Power Input. Connect this pin to the input power source and connect a bypass capacitor between this pin and 20, 21 ground. 22 AVIN Bias Voltage Input Pin. Connect a bypass capacitor between this pin and GND and a small (10 Ω) resistor between this pin and PVIN. 23 EN Precision Enable Input Pin. An external resistor divider can be used to set the turn-on threshold. To enable the device automatically, connect the EN pin to PVIN. This pin has a 1 MΩ pull-down resistor to GND. 24 VREG Internal Bias Regulator Output. It supplies the regulated voltage to the internal circuitry. Bypass the VREG pin to the GND pin with a high quality, low ESR 1 µF ceramic capacitor. EPAD Exposed Pad. Solder the exposed pad to an external ground plane underneath the IC for thermal dissipation. Rev. B | Page 7 of 23 Document Outline Features Applications General Description Typical Application Circuit Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode Enable/Shutdown Internal Regulator (VREG) Bootstrap Circuitry Oscillator and Synchronization Soft Start Tracking Power-Good (PGOOD) Peak Current-Limit and Short-Circuit Protection Overvoltage Protection Undervoltage Lockout Thermal Shutdown Applications Information ADIsimPower Design Tool Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Compensation Design Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Printed Circuit Board Layout Recommendations Reference Designs Outline Dimensions Ordering Guide