Datasheet ADP2311 (Analog Devices) - 3

Data Sheet ADP2311 FUNCTIONAL BLOCK DIAGRAM UVLO PVIN1 ADP2311 ACS1 ACS HICCUP OCP MODE BOOST I1 REGULATOR MAX SLOPE RAMP1 BST1 SOFT START + DRIVER 0.6V + AMP1 CMP1 SW1 FB1 – CONTROL 0.7V OVP LOGIC – AND VREG MOSFET + DRIVER WITH DRIVER – POR1 ANTI-CROSS CLK1 PGND1 0.579V PROTECTION + LOW-SIDE CURRENT SENSE – ITIMER + TIMER POR RSTO POR PVIN1 DELAY POR1 TIMER CONTROL LOGIC POR2 5V VREG REGULATOR CLK1 FB1 – SLOPE RAMP1 GND + OSC CLK2 48mV – PFI SLOPE RAMP2 + 0.6V POWER-UP + AND FB2 – POWER-DOWN PFO – 1.2V SEQUENCE + CONTROL EN 1µA POR1 4µA 0.6V – + VM2 WDI RSTO RESET POR2 UVLO PVIN2 GENERATOR ACS1 2 HICCUP OCP MODE BOOST I2 REGULATOR MAX SLOPE RAMP2 BST2 SOFT START + DRIVER 0.6V + AMP2 CMP2 FB2 – SW2 CONTROL 0.7V OVP LOGIC – AND VREG MOSFET + DRIVER WITH DRIVER – POR2 ANTI-CROSS CLK2 PGND2 0.579V PROTECTION + LOW-SIDE CURRENT SENSE +
003 1036- 1 Figure 3. Rev. B | Page 3 of 20 Document Outline Features Applications Typical Application Circuit General Description Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme Precision Enable/Shutdown Internal Regulator (VREG) Bootstrap Circuitry Soft Start Peak Current-Limit and Short-Circuit Protection Power-On Reset (POR) TIMER Pin Configuration Power Fail Comparator Voltage Monitor Comparator (VM2) Watchdog Timer Power-Up and Power-Down Sequence Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Inductor Selection Output Capacitor Selection Application Circuit Outline Dimensions Ordering Guide