Datasheet ADP2442 (Analog Devices) - 9

ManufacturerAnalog Devices
Description36 V,1 A, Synchronous, Step-Down, DC-to-DC Regulator with External Clock Synchronization
Pages / Page36 / 9 — Data Sheet. ADP2442. 0.3. 400. VIN = 12V. 350. fSW = 300kHz. 0.2. VIN = …
RevisionB
File Format / SizePDF / 1.6 Mb
Document LanguageEnglish

Data Sheet. ADP2442. 0.3. 400. VIN = 12V. 350. fSW = 300kHz. 0.2. VIN = 24V. VIN = 36V. 300. 0.1. 250. AD CURRE. SW = 700kHz. RRO. 200. D L. 150. –0.1. S RE H

Data Sheet ADP2442 0.3 400 VIN = 12V 350 fSW = 300kHz 0.2 VIN = 24V VIN = 36V 300 0.1 250 AD CURRE SW = 700kHz RRO 200 D L 150 –0.1 S RE H

Model Line for this Datasheet

Text Version of Document

Data Sheet ADP2442 0.3 400 VIN = 12V A) 350 fSW = 300kHz 0.2 VIN = 24V (m VIN = 36V NT 300 ) 0.1 (% 250 R f AD CURRE SW = 700kHz 0 O RRO 200 E D L T L OU 150 V HO –0.1 S RE H 100 T –0.2 P VOUT = 5V SKI 50 V f OUT = 3.3V SW = 700kHz P SYNC = VCC, FORCED PWM MODE –0.3 0 0 0.2 0.4 0.6 0.8 1.0 1.2
16 1
5 10 15 20 25 30 35 40
-013 67-
LOAD (A)
667 106
VIN (V)
10 Figure 16. Load Regulation for Different Supplies Figure 19. Pulse Skip (PSKIP) Threshold Load Current, VOUT = 3.3 V
1.0 300 0.8 ) A fSW = 300kHz (m 250 0.6 NT E 0.4 ) TA = +25°C RR 200 % 0.2 CU R ( TA = –40°C AD fSW = 700kHz 0 O RRO 150 L E D T L –0.2 OUV HO S 100 –0.4 E T HR –0.6 A = +125°C VIN = 24V T V IP OUT = 5V 50 SK –0.8 f V SW = 700kHz P OUT = 5V SYNC = AGND PULSE SKIP MODE –1.0 0 0 0.2 0.4 0.6 0.8 1.0
17 1 7-
10 15 20 25 30 35 40
014
LOAD (A)
67- 066 1
VIN (V)
106 Figure 17. Load Regulation for Different Temperatures Figure 20. Pulse Skip Threshold Load Current, VOUT = 5 V
0.30 300 0.25 A) 0.20 (m 250 f 0.15 NT SW = 300kHz LOAD = 1A E ) 0.10 200 URR (% R 0.05 D C A 0 O RRO LOAD = 500mA 150 E D L f T SW = 600kHz –0.05 L OUV HO –0.10 S 100 RE –0.15 H VOUT = 5V T –0.20 f IP 50 SW = 700kHz SYNC = VCC PWM MODE SK V –0.25 P OUT = 12V –0.30 0
8
7 12 17 22 27 32 37 42
1 -1
15 20 25 30 35 40
015
V
667 67-
IN (V) V
10
IN (V)
106 Figure 18. Line Regulation, VOUT = 5 V for Different Loads Figure 21. Pulse Skip Threshold Load Current, VOUT = 12 V Rev. B | Page 9 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL CIRCUIT CONFIGURATION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EFFICIENCY IN FORCED FIXED FREQUENCY MODE EFFICIENCY IN PULSE SKIP MODE INTERNAL BLOCK DIAGRAM THEORY OF OPERATION CONTROL ARCHITECURE Fixed Frequency Mode Pulse Skip Mode ADJUSTABLE FREQUENCY POWER GOOD MODE OF OPERATION EXTERNAL SYNCHRONIZATION SOFT START UNDERVOLTAGE LOCKOUT PRECISION ENABLE/SHUTDOWN CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL SELECTING THE OUTPUT VOLTAGE SETTING THE SWITCHING FREQUENCY EXTERNAL COMPONENT SELECTION Input Capacitor Selection Inductor Selection Output Capacitor Selection BOOST CAPACITOR VCC CAPACITOR LOOP COMPENSATION LARGE SIGNAL ANALYSIS OF THE LOOP COMPENSATION DESIGN EXAMPLE CONFIGURATION AND COMPONENTS SELECTION Resistor Divider Switching Frequency Inductor Selection Input Capacitor Selection Output Capacitor Selection Compensation Selection SYSTEM CONFIGURATION TYPICAL APPLICATION CIRCUITS DESIGN EXAMPLE OTHER TYPICAL CIRCUIT CONFIGURATIONS POWER DISSIPATION AND THERMAL CONSIDERATIONS POWER DISSIPATION Inductor Losses Power Switch Conduction Losses Switching Losses Transition Losses THERMAL CONSIDERATIONS EVALUATION BOARD THERMAL PERFORMANCE CIRCUIT BOARD LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE