Datasheet ADP2380 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 20 V, 4 A synchronous Step-Down Regulator with Low-Side Driver |
| Pages / Page | 28 / 8 — ADP2380. Data Sheet. 4.5. 1.30. RISING. FALLING. 4.4. 1.25. 4.3. (V). D … |
| File Format / Size | PDF / 946 Kb |
| Document Language | English |
ADP2380. Data Sheet. 4.5. 1.30. RISING. FALLING. 4.4. 1.25. 4.3. (V). D L. 4.2. D ( L 1.20. ESH. 4.1. R H. 1.15. HRE. 4.0. IN T. 3.9. O 1.10. PVI. 3.8. 1.05. 3.7. 3.6. 1.00
Model Line for this Datasheet
Text Version of Document
ADP2380 Data Sheet 4.5 1.30 RISING RISING FALLING 4.4 FALLING 1.25 4.3 ) (V) V D L 4.2 D ( L 1.20 O HO ESH 4.1 S R H 1.15 HRE T 4.0 O IN T VL P U 3.9 O 1.10 N L PVI UV 3.8 1.05 3.7 3.6 1.00
1
–40 –20 0 20 40 60 80 100 120
010
–40 –20 0 20 40 60 80 100 120
1 0
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 10. PVIN UVLO Threshold vs. Temperature Figure 13. UVLO Pin Threshold vs. Temperature
3.3 606 604 3.2 V) (μA) NT 602 E (m 3.1 G A LT CURRE O 600 P -U 3.0 L L DBACK V 598 E E SS PU F 2.9 596 2.8 594 –40 –20 0 20 40 60 80 100 120
012
–40 –20 0 20 40 60 80 100 120
013
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 11. SS Pin Pull-Up Current vs. Temperature Figure 14. FB Voltage vs. Temperature
530 R 8.4 OSC = 100kΩ 8.3 520 8.2 ) 510 kHz 8.1 ( E (V) Y G A NC 500 LT 8.0 UE Q VO RE EG 7.9 F 490 VR 7.8 480 7.7 470–40 –20 0 20 40 60 80 100 120 7.6
014
–40 –20 0 20 40 60 80 100 120
015
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 12. Frequency vs. Temperature Figure 15. VREG Voltage vs. Temperature Rev. 0 | Page 8 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide
1
–40 –20 0 20 40 60 80 100 120
010
–40 –20 0 20 40 60 80 100 120
1 0
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 10. PVIN UVLO Threshold vs. Temperature Figure 13. UVLO Pin Threshold vs. Temperature
3.3 606 604 3.2 V) (μA) NT 602 E (m 3.1 G A LT CURRE O 600 P -U 3.0 L L DBACK V 598 E E SS PU F 2.9 596 2.8 594 –40 –20 0 20 40 60 80 100 120
012
–40 –20 0 20 40 60 80 100 120
013
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 11. SS Pin Pull-Up Current vs. Temperature Figure 14. FB Voltage vs. Temperature
530 R 8.4 OSC = 100kΩ 8.3 520 8.2 ) 510 kHz 8.1 ( E (V) Y G A NC 500 LT 8.0 UE Q VO RE EG 7.9 F 490 VR 7.8 480 7.7 470–40 –20 0 20 40 60 80 100 120 7.6
014
–40 –20 0 20 40 60 80 100 120
015
TEMPERATURE (°C)
09939-
TEMPERATURE (°C)
09939- Figure 12. Frequency vs. Temperature Figure 15. VREG Voltage vs. Temperature Rev. 0 | Page 8 of 28 Document Outline Features Applications Typical Applications Circuit General Description Revision History Specifications Absolute Maximum Ratings Thermal Information ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Functional Block Diagram Theory of Operation Control Scheme Internal Regulator (VREG) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Enable and Soft Start Power Good Peak Current-Limit and Short-Circuit Protection Overvoltage Protection (OVP) Undervoltage Lockout (UVLO) Thermal Shutdown Applications Information Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming Input Voltage UVLO Compensation Design Compensation Network Between COMP and GND Compensation Network Between COMP and FB ADIsimPower Design Tool Design Example Output Voltage Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Program Input Capacitor Selection Recommended External Components Circuit Board Layout Recommendations Typical Applications Circuits Outline Dimensions Ordering Guide
