Datasheet LT3694, LT3694-1 (Analog Devices) - 10

LT3694/LT3694-1
APPLICATIONS INFORMATION STEP DOWN SWITCHING REGULATOR
each clock cycle if there is sufficient voltage across the boost capacitor (C3 in Figure 1) to fully saturate the output
Feedback Resistor Network
switch. A forced switch off for a minimum time will only The output voltage is programmed with a resistor divider occur at the end of a clock cycle when the boost capaci- (refer to the Block Diagram in Figure 1) between the output tor needs to be recharged. This operation has the same and the FB pin. Choose the resistors according to: effect as lowering the clock frequency for a fixed off time, resulting in a higher duty cycle and lower minimum input  V  R1=R2 OUT −1 voltage. The resultant duty cycle depends on the charging  750mV  times of the boost capacitor and can be approximated by the following equation: The parallel combination of R1 and R2 should be 10k or B less to avoid bias current errors. DC MAX = B + 1
Input Overvoltage Lockout
An important feature of the LT3694 is the ability to survive where B is the output current divided by the typical transient surges on the input voltage of up to 70V. This is boost current from the BST Pin Current vs Switch Cur- accomplished by shutting off the regulators to keep this rent curve in the Typical Performance Characteristics high voltage off the critical components. The overvoltage section. lockout trips when the input voltage exceeds 38V. The maximum voltage, VIN, for constant-frequency opera- tion is determined by the minimum duty cycle DC
Input Voltage Range
MIN: V The minimum operating voltage is determined either by the V OUT + VF IN(MAXCF) = − VF + VSW LT3694’s internal undervoltage lockout or by its maximum DC MIN duty cycle. The duty cycle is the fraction of time that the internal switch is on and is determined by the input and with DCMIN = tON(MIN) • fSW output voltage: Thus, both the maximum and minimum input voltages V for constant-frequency operation are a function of the DC = OUT + VF V switching frequency and output voltage. Therefore, the IN − VSW + VF maximum switching frequency must be set to a value that accommodates the input and output voltage parameters where VF is the forward voltage drop of the catch diode and must meet both of the following criteria: and VSW is the voltage drop of the internal switch (~0.3V at maximum load). This leads to a minimum input  V  1 voltage of: f OUT + VF MAX1=  V  •  IN(MAXCF) − VSW + VF  tON(MIN) V V OUT + VF IN(MINCF) = − V   DC F + VSW V 1 f OUT + VF MAX(CF) MAX2 = 1  − V  •  IN(MINCF) − VSW + VF  tOFF(MIN) The duty cycle is the fraction of time that the internal switch is on during a clock cycle. The maximum duty cycle The values of tON(MIN) and tOFF(MIN) are functions of for constant-frequency operation given by DCMAX(CF) = 1 ISW and temperature (see chart in the Typical Perform- – tOFF(MIN) • fSW. However, unlike most fixed frequency ance Characteristics section). Worst-case values for regulators, the LT3694 will not switch off at the end of switch currents greater than 0.5A are tON(MIN) = 130ns and 36941fb 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts