Datasheet LTC3544 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Quad Synchronous Step-Down Regulator: 2.25MHz, 300mA, 200mA, 200mA, 100mA |
| Pages / Page | 16 / 8 — FUNCTIONAL DIAGRAMS |
| File Format / Size | PDF / 300 Kb |
| Document Language | English |
FUNCTIONAL DIAGRAMS
Model Line for this Datasheet
Text Version of Document
LTC3544
FUNCTIONAL DIAGRAMS
3 9 15 14 16 12 RUN200A RUN300 VCC GNDA RUN200B RUN100 SHDN 0.8V OSC REF RUN LOGIC SW200A SW100 5 13 IBIAS200A IBIAS100 POWER POWER FETs FETs VFB200A VFB100 2 REG200A REG100 11 SW300 SW200B 8 4 I I BIAS300 BIAS200B POWER POWER FETs FETs V V FB300 FB200B 10 REG300 1 REG200B PVIN PGND 7 6 3544 FD01 REGULATOR BURST CLAMP 3 PV SLOPE IN COMP VFBx 1 – – I SLEEP – + TH 10Ω EA ICOMP + VSLEEP + 0.8V BURST S Q RS LATCH SOFT-START R Q SWITCHING LOGIC AND BLANKING ANTI CIRCUIT SHOOT- THRU 4 SWx + IRCMP – SHUTDOWN 5 PGND 3544 FD02 0.8V VREF OSC OSC 3544fa 8
FUNCTIONAL DIAGRAMS
3 9 15 14 16 12 RUN200A RUN300 VCC GNDA RUN200B RUN100 SHDN 0.8V OSC REF RUN LOGIC SW200A SW100 5 13 IBIAS200A IBIAS100 POWER POWER FETs FETs VFB200A VFB100 2 REG200A REG100 11 SW300 SW200B 8 4 I I BIAS300 BIAS200B POWER POWER FETs FETs V V FB300 FB200B 10 REG300 1 REG200B PVIN PGND 7 6 3544 FD01 REGULATOR BURST CLAMP 3 PV SLOPE IN COMP VFBx 1 – – I SLEEP – + TH 10Ω EA ICOMP + VSLEEP + 0.8V BURST S Q RS LATCH SOFT-START R Q SWITCHING LOGIC AND BLANKING ANTI CIRCUIT SHOOT- THRU 4 SWx + IRCMP – SHUTDOWN 5 PGND 3544 FD02 0.8V VREF OSC OSC 3544fa 8
