Datasheet LT3684 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 36V, 2A, 2.8MHz Step-Down Switching Regulator |
| Pages / Page | 24 / 8 — BLOCK DIAGRAM. OPERATION |
| File Format / Size | PDF / 426 Kb |
| Document Language | English |
BLOCK DIAGRAM. OPERATION
Model Line for this Datasheet
Text Version of Document
LT3684
BLOCK DIAGRAM
VIN VIN 4 C1 BIAS – 7 INTERNAL 1.265V REF + BD 1 RUN/SS 5 ∑ SLOPE COMP SWITCH BOOST LATCH 2 R C3 RT OSCILLATOR Q 10 300kHz–2.8MHz S RT SW L1 V 3 OUT SOFT-START VC CLAMP C2 D1 PG 6 ERROR AMP + 1.12V + VC – – 9 CC CF R GND FB C 11 8 R2 R1 3684 BD
OPERATION
The LT3684 is a constant frequency, current mode step- This improves efficiency. The RUN/SS pin is used to place down regulator. An oscillator, with frequency set by RT, the LT3684 in shutdown, disconnecting the output and enables an RS flip-flop, turning on the internal power reducing the input current to less than 1µA. switch. An amplifier and comparator monitor the current The switch driver operates from either the input or from flowing between the VIN and SW pins, turning the switch the BOOST pin. An external capacitor and diode are used off when this current reaches a level determined by the to generate a voltage at the BOOST pin that is higher than voltage at VC. An error amplifier measures the output the input supply. This allows the driver to fully saturate voltage through an external resistor divider tied to the FB the internal bipolar NPN power switch for efficient pin and servos the VC pin. If the error amplifier’s output operation. increases, more current is delivered to the output; if it decreases, less current is delivered. An active clamp on the The oscillator reduces the LT3684’s operating frequency VC pin provides current limit. The VC pin is also clamped to when the voltage at the FB pin is low. This frequency the voltage on the RUN/SS pin; soft-start is implemented foldback helps to control the output current during startup by generating a voltage ramp at the RUN/SS pin using an and overload. external resistor and capacitor. The LT3684 contains a power good comparator which trips An internal regulator provides power to the control cir- when the FB pin is at 90% of its regulated value. The PG cuitry. The bias regulator normally draws power from the output is an open-collector transistor that is off when the VIN pin, but if the BIAS pin is connected to an external output is in regulation, allowing an external resistor to pull voltage higher than 3V bias power will be drawn from the the PG pin high. Power good is valid when the LT3684 is external source (typically the regulated output voltage). enabled and VIN is above 3.6V. 3684fa 8 For more information www.linear.com/LT3684
BLOCK DIAGRAM
VIN VIN 4 C1 BIAS – 7 INTERNAL 1.265V REF + BD 1 RUN/SS 5 ∑ SLOPE COMP SWITCH BOOST LATCH 2 R C3 RT OSCILLATOR Q 10 300kHz–2.8MHz S RT SW L1 V 3 OUT SOFT-START VC CLAMP C2 D1 PG 6 ERROR AMP + 1.12V + VC – – 9 CC CF R GND FB C 11 8 R2 R1 3684 BD
OPERATION
The LT3684 is a constant frequency, current mode step- This improves efficiency. The RUN/SS pin is used to place down regulator. An oscillator, with frequency set by RT, the LT3684 in shutdown, disconnecting the output and enables an RS flip-flop, turning on the internal power reducing the input current to less than 1µA. switch. An amplifier and comparator monitor the current The switch driver operates from either the input or from flowing between the VIN and SW pins, turning the switch the BOOST pin. An external capacitor and diode are used off when this current reaches a level determined by the to generate a voltage at the BOOST pin that is higher than voltage at VC. An error amplifier measures the output the input supply. This allows the driver to fully saturate voltage through an external resistor divider tied to the FB the internal bipolar NPN power switch for efficient pin and servos the VC pin. If the error amplifier’s output operation. increases, more current is delivered to the output; if it decreases, less current is delivered. An active clamp on the The oscillator reduces the LT3684’s operating frequency VC pin provides current limit. The VC pin is also clamped to when the voltage at the FB pin is low. This frequency the voltage on the RUN/SS pin; soft-start is implemented foldback helps to control the output current during startup by generating a voltage ramp at the RUN/SS pin using an and overload. external resistor and capacitor. The LT3684 contains a power good comparator which trips An internal regulator provides power to the control cir- when the FB pin is at 90% of its regulated value. The PG cuitry. The bias regulator normally draws power from the output is an open-collector transistor that is off when the VIN pin, but if the BIAS pin is connected to an external output is in regulation, allowing an external resistor to pull voltage higher than 3V bias power will be drawn from the the PG pin high. Power good is valid when the LT3684 is external source (typically the regulated output voltage). enabled and VIN is above 3.6V. 3684fa 8 For more information www.linear.com/LT3684
