Datasheet LTC3412A (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 3A, 4MHz, Monolithic Synchronous Step-Down Regulator |
| Pages / Page | 20 / 7 — PIN FUNCTIONS (FE/UHF). SVIN (Pin 1/Pin 11):. RUN/SS (Pin 7/Pin 1):. … |
| File Format / Size | PDF / 460 Kb |
| Document Language | English |
PIN FUNCTIONS (FE/UHF). SVIN (Pin 1/Pin 11):. RUN/SS (Pin 7/Pin 1):. PGOOD (Pin 2/Pin 12):. SGND (Pin 8/Pin 2):
Model Line for this Datasheet
Text Version of Document
LTC3412A
PIN FUNCTIONS (FE/UHF) SVIN (Pin 1/Pin 11):
Signal Input Supply. Decouple this
RUN/SS (Pin 7/Pin 1):
Run Control and Soft-Start Input. pin to SGND with a capacitor. Forcing this pin below 0.5V shuts down the LTC3412A.
PGOOD (Pin 2/Pin 12):
Power Good Output. Open-drain In shutdown all functions are disabled drawing <1µA of logic output that is pulled to ground when the output volt- supply current. A capacitor to ground from this pin sets age is not within ±7.5% of regulation point. the ramp time to full output current.
I SGND (Pin 8/Pin 2):
Signal Ground. All small-signal com-
TH (Pin 3/Pin 13):
Error Amplifier Compensation Point. The current comparator threshold increases with this ponents, compensation components and the exposed pad control voltage. Nominal voltage range for this pin is from on the bottom side of the IC should connect to this ground, 0.2V to 1.4V with 0.4V corresponding to the zero-sense which in turn connects to PGND at one point. voltage (zero current).
PVIN (Pins 9, 16/Pins 3, 10):
Power Input Supply. Decouple
V
this pin to PGND with a capacitor.
FB (Pin 4/Pin 14):
Feedback Pin. Receives the feedback voltage from a resistive divider connected across the
SW (Pins 10, 11, 14, 15/Pins 4, 5, 8, 9):
Switch Node output. Connection to the Inductor. This pin connects to the drains
R
of the internal main and synchronous power MOSFET
T (Pin 5/Pin 15):
Oscillator Resistor Input. Connecting a resistor to ground from this pin sets the switching switches. frequency.
PGND (Pins 12, 13/Pins 6, 7):
Power Ground. Connect
SYNC/MODE (Pin 6/Pin 16):
Mode Select and External this pin close to the (–) terminal of CIN and COUT . Clock Synchronization Input. To select forced continuous,
Exposed Pad (Pin 17/Pin 17):
Signal Ground. Must be tie to SVIN. Connecting this pin to a voltage between 0V soldered to PCB for electrical connection and rated thermal and 1V selects Burst Mode operation with the burst clamp performance. set to the pin voltage. 3412aff Fo F r o rmo m r o e r e inf n o f r o m r a m t a iton o n ww w w w . w line n a e r a .rco c m o / m L / T L C T 3 C 41 3 2 41 A 2 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts
PIN FUNCTIONS (FE/UHF) SVIN (Pin 1/Pin 11):
Signal Input Supply. Decouple this
RUN/SS (Pin 7/Pin 1):
Run Control and Soft-Start Input. pin to SGND with a capacitor. Forcing this pin below 0.5V shuts down the LTC3412A.
PGOOD (Pin 2/Pin 12):
Power Good Output. Open-drain In shutdown all functions are disabled drawing <1µA of logic output that is pulled to ground when the output volt- supply current. A capacitor to ground from this pin sets age is not within ±7.5% of regulation point. the ramp time to full output current.
I SGND (Pin 8/Pin 2):
Signal Ground. All small-signal com-
TH (Pin 3/Pin 13):
Error Amplifier Compensation Point. The current comparator threshold increases with this ponents, compensation components and the exposed pad control voltage. Nominal voltage range for this pin is from on the bottom side of the IC should connect to this ground, 0.2V to 1.4V with 0.4V corresponding to the zero-sense which in turn connects to PGND at one point. voltage (zero current).
PVIN (Pins 9, 16/Pins 3, 10):
Power Input Supply. Decouple
V
this pin to PGND with a capacitor.
FB (Pin 4/Pin 14):
Feedback Pin. Receives the feedback voltage from a resistive divider connected across the
SW (Pins 10, 11, 14, 15/Pins 4, 5, 8, 9):
Switch Node output. Connection to the Inductor. This pin connects to the drains
R
of the internal main and synchronous power MOSFET
T (Pin 5/Pin 15):
Oscillator Resistor Input. Connecting a resistor to ground from this pin sets the switching switches. frequency.
PGND (Pins 12, 13/Pins 6, 7):
Power Ground. Connect
SYNC/MODE (Pin 6/Pin 16):
Mode Select and External this pin close to the (–) terminal of CIN and COUT . Clock Synchronization Input. To select forced continuous,
Exposed Pad (Pin 17/Pin 17):
Signal Ground. Must be tie to SVIN. Connecting this pin to a voltage between 0V soldered to PCB for electrical connection and rated thermal and 1V selects Burst Mode operation with the burst clamp performance. set to the pin voltage. 3412aff Fo F r o rmo m r o e r e inf n o f r o m r a m t a iton o n ww w w w . w line n a e r a .rco c m o / m L / T L C T 3 C 41 3 2 41 A 2 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts
