Datasheet LTC3548-2 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Dual Synchronous, Fixed/Adjustable Output, 2.25MHz Step-Down DC/DC Regulator |
| Pages / Page | 16 / 7 — OPERATION. Main Control Loop. Dropout Operation. Low Current Operation. … |
| File Format / Size | PDF / 418 Kb |
| Document Language | English |
OPERATION. Main Control Loop. Dropout Operation. Low Current Operation. Low Supply Operation
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LTC3548-2
OPERATION
The LTC3548-2 uses a constant-frequency, current mode To optimize effi ciency, the Burst Mode operation can be architecture. The operating frequency is set at 2.25MHz selected. When the load is relatively light, the LTC3548-2 and can be synchronized to an external oscillator. Both automatically switches into Burst Mode operation in which channels share the same clock and run in-phase. To suit a the PMOS switch operates intermittently based on load variety of applications, the selectable MODE pin allows the demand with a fi xed peak inductor current. By running user to choose between low noise and high effi ciency. cycles periodically, the switching losses which are domi- nated by the gate charge losses of the power MOSFETs The output voltage for channel 1 is set by an internal divider are minimized. The main control loop is interrupted when returned to the VOUT1 pin. The output voltage for channel 2 the output voltage reaches the desired regulated value. A is set by an external divider returned to the VFB2 pin. An voltage comparator trips when I error amplifi er compares the feedback output voltage with TH is below 0.35V, shutting off the switch and reducing the power. The output capaci- a reference voltage of 0.6V and adjusts the peak inductor tor and the inductor supply the power to the load until I current accordingly. An undervoltage comparator will TH exceeds 0.65V, turning on the switch and the main control pull the POR output low if the output voltage is not above loop which starts another cycle. –8.5% of the reference voltage. The POR output will go high after 262,144 clock cycles (about 117ms in pulse- For lower ripple noise at low currents, the pulse-skipping skipping mode) of achieving regulation. mode can be used. In this mode, the LTC3548-2 continues to switch at a constant frequency down to very low cur-
Main Control Loop
rents, where it will begin skipping pulses. The effi ciency in During normal operation, the top power switch (P-channel pulse-skipping mode can be improved slightly by connect- MOSFET) is turned on at the beginning of a clock cycle ing the SW node to the MODE/SYNC input which reduces when the V the clock frequency by approximately 30%. FB voltage (see the Block Diagram) is below the the reference voltage. The current into the inductor and
Dropout Operation
the load increases until the current limit is reached. The switch turns off and energy stored in the inductor fl ows When the input supply voltage decreases toward the through the bottom switch (N-channel MOSFET) into the output voltage, the duty cycle increases to 100% which load until the next clock cycle. is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal The peak inductor current is controlled by the internally to the input voltage minus the voltage drops across the compensated ITH voltage, which is the output of the er- internal P-channel MOSFET and the inductor. ror amplifi er. This amplifi er compares the VFB to the 0.6V reference. When the load current increases, the VFB volt- An important design consideration is that the RDS(ON) age decreases slightly below the reference. This decrease of the P-channel switch increases with decreasing input causes the error amplifi er to increase the ITH voltage until supply voltage (see Typical Performance Characteristics). the average inductor current matches the new load cur- Therefore, the user should calculate the power dissipation rent. The main control loop is shut down by pulling the when the LTC3548-2 is used at 100% duty cycle with low RUN pin to ground. input voltage (see Thermal Considerations in the Applica- tions Information section).
Low Current Operation Low Supply Operation
By selecting MODE/SYNC (Pin 6), two modes are available to control the operation of the LTC3548-2 at low currents. To prevent unstable operation, the LTC3548-2 incorporates Both modes automatically switch from continuous opera- an undervoltage lockout circuit that shuts down the part tion to the selected mode when the load current is low. when the input voltage drops below about 1.65V. 35482fb 7
OPERATION
The LTC3548-2 uses a constant-frequency, current mode To optimize effi ciency, the Burst Mode operation can be architecture. The operating frequency is set at 2.25MHz selected. When the load is relatively light, the LTC3548-2 and can be synchronized to an external oscillator. Both automatically switches into Burst Mode operation in which channels share the same clock and run in-phase. To suit a the PMOS switch operates intermittently based on load variety of applications, the selectable MODE pin allows the demand with a fi xed peak inductor current. By running user to choose between low noise and high effi ciency. cycles periodically, the switching losses which are domi- nated by the gate charge losses of the power MOSFETs The output voltage for channel 1 is set by an internal divider are minimized. The main control loop is interrupted when returned to the VOUT1 pin. The output voltage for channel 2 the output voltage reaches the desired regulated value. A is set by an external divider returned to the VFB2 pin. An voltage comparator trips when I error amplifi er compares the feedback output voltage with TH is below 0.35V, shutting off the switch and reducing the power. The output capaci- a reference voltage of 0.6V and adjusts the peak inductor tor and the inductor supply the power to the load until I current accordingly. An undervoltage comparator will TH exceeds 0.65V, turning on the switch and the main control pull the POR output low if the output voltage is not above loop which starts another cycle. –8.5% of the reference voltage. The POR output will go high after 262,144 clock cycles (about 117ms in pulse- For lower ripple noise at low currents, the pulse-skipping skipping mode) of achieving regulation. mode can be used. In this mode, the LTC3548-2 continues to switch at a constant frequency down to very low cur-
Main Control Loop
rents, where it will begin skipping pulses. The effi ciency in During normal operation, the top power switch (P-channel pulse-skipping mode can be improved slightly by connect- MOSFET) is turned on at the beginning of a clock cycle ing the SW node to the MODE/SYNC input which reduces when the V the clock frequency by approximately 30%. FB voltage (see the Block Diagram) is below the the reference voltage. The current into the inductor and
Dropout Operation
the load increases until the current limit is reached. The switch turns off and energy stored in the inductor fl ows When the input supply voltage decreases toward the through the bottom switch (N-channel MOSFET) into the output voltage, the duty cycle increases to 100% which load until the next clock cycle. is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal The peak inductor current is controlled by the internally to the input voltage minus the voltage drops across the compensated ITH voltage, which is the output of the er- internal P-channel MOSFET and the inductor. ror amplifi er. This amplifi er compares the VFB to the 0.6V reference. When the load current increases, the VFB volt- An important design consideration is that the RDS(ON) age decreases slightly below the reference. This decrease of the P-channel switch increases with decreasing input causes the error amplifi er to increase the ITH voltage until supply voltage (see Typical Performance Characteristics). the average inductor current matches the new load cur- Therefore, the user should calculate the power dissipation rent. The main control loop is shut down by pulling the when the LTC3548-2 is used at 100% duty cycle with low RUN pin to ground. input voltage (see Thermal Considerations in the Applica- tions Information section).
Low Current Operation Low Supply Operation
By selecting MODE/SYNC (Pin 6), two modes are available to control the operation of the LTC3548-2 at low currents. To prevent unstable operation, the LTC3548-2 incorporates Both modes automatically switch from continuous opera- an undervoltage lockout circuit that shuts down the part tion to the selected mode when the load current is low. when the input voltage drops below about 1.65V. 35482fb 7
