Datasheet LTC3410 (Analog Devices) - 7

LTC3410
U OPERATIO (Refer to Functional Diagram) Main Control Loop Short-Circuit Protection
The LTC3410 uses a constant frequency, current mode When the output is shorted to ground, the frequency of the step-down architecture. Both the main (P-channel oscillator is reduced to about 310kHz, 1/7 the nominal MOSFET) and synchronous (N-channel MOSFET) switches frequency. This frequency foldback ensures that the in- are internal. During normal operation, the internal top ductor current has more time to decay, thereby preventing power MOSFET is turned on each cycle when the oscillator runaway. The oscillator’s frequency will progressively sets the RS latch, and turned off when the current com- increase to 2.25MHz when VFB rises above 0V. parator, ICOMP, resets the RS latch. The peak inductor current at which I
Dropout Operation
COMP resets the RS latch, is controlled by the output of error amplifier EA. The VFB pin, described in As the input supply voltage decreases to a value approach- the Pin Functions section, allows EA to receive an output ing the output voltage, the duty cycle increases toward the feedback voltage from an external resistive divider. When maximum on-time. Further reduction of the supply volt- the load current increases, it causes a slight decrease in age forces the main switch to remain on for more than one the feedback voltage relative to the 0.8V reference, which cycle until it reaches 100% duty cycle. The output voltage in turn, causes the EA amplifier’s output voltage to in- will then be determined by the input voltage minus the crease until the average inductor current matches the new voltage drop across the P-channel MOSFET and the load current. While the top MOSFET is off, the bottom inductor. MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal Another important detail to remember is that at low input comparator I supply voltages, the R RCMP, or the beginning of the next clock cycle. DS(ON) of the P-channel switch increases (see Typical Performance Characteristics).
Burst Mode Operation
Therefore, the user should calculate the power dissipation The LTC3410 is capable of Burst Mode operation in which when the LTC3410 is used at 100% duty cycle with low the internal power MOSFETs operate intermittently based input voltage (See Thermal Considerations in the Applica- on load demand. tions Information section). When the converter is in Burst Mode operation, the peak
Slope Compensation and Inductor Peak Current
current of the inductor is set to approximately 70mA re- gardless of the output load. Each burst event can last from Slope compensation provides stability in constant fre- a few cycles at light loads to almost continuously cycling quency architectures by preventing subharmonic oscilla- with short sleep intervals at moderate loads. In between tions at high duty cycles. It is accomplished internally by these burst events, the power MOSFETs and any unneeded adding a compensating ramp to the inductor current circuitry are turned off, reducing the quiescent current to signal at duty cycles in excess of 40%. Normally, this 26µA. In this sleep state, the load current is being supplied results in a reduction of maximum inductor peak current solely from the output capacitor. As the output voltage for duty cycles > 40%. However, the LTC3410 uses a droops, the EA amplifier’s output rises above the sleep patented scheme that counteracts this compensating threshold signaling the BURST comparator to trip and turn ramp, which allows the maximum inductor peak current the top MOSFET on. This process repeats at a rate that is to remain unaffected throughout all duty cycles. dependent on the load demand. 3410fb 7