Datasheet LTC3418 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 8A, 4MHz, Monolithic Synchronous Step-Down Regulator |
| Pages / Page | 22 / 6 — pin FuncTions. SW (Pins 1, 2, 11, 12, 20, 21, 30, 31):. VREF (Pin 16):. … |
| File Format / Size | PDF / 494 Kb |
| Document Language | English |
pin FuncTions. SW (Pins 1, 2, 11, 12, 20, 21, 30, 31):. VREF (Pin 16):. SVIN (Pin 24):
Model Line for this Datasheet
Text Version of Document
LTC3418
pin FuncTions SW (Pins 1, 2, 11, 12, 20, 21, 30, 31):
Switch Node Con-
VREF (Pin 16):
Reference Output. Decouple this pin with nection to Inductor. This pin connects to the drains of the a 2.2µF capacitor. internal main and synchronous power MOSFET switches.
SVIN (Pin 24):
Signal Input Supply. Decouple this pin to
PVIN (Pins 3, 4, 9, 10, 22, 23, 28, 29):
Power Input SGND with a capacitor. Supply. Decouple these pins to PGND with capacitors on all four corners of the package.
VFB (Pin 25):
Feedback Pin. Receives the feedback volt- age from a resistive divider connected across the output.
PGOOD (Pin 5):
Power Good Output. Open-drain logic output that is pulled to ground when the output voltage
ITH (Pin 26):
Error Amplifier Compensation Point. The is not within ±7.5% of regulation point. current comparator threshold increases with this control voltage. Nominal voltage range for this pin is from 0.2V
RT (Pin 6):
Oscillator Resistor Input. Connecting a resis- to 1.4V with 0.4V corresponding to the zero-sense voltage tor to ground from this pin sets the switching frequency. (zero current).
RUN/SS (Pin 7):
Run Control and Soft-Start Input. Forcing
SYNC/MODE (Pin 27):
Mode Select and External Clock this pin below 0.5V shuts down the LTC3418. In shutdown Synchronization Input. To select Forced Continuous, tie all functions are disabled drawing <1.5µA of supply cur- to SVIN. Connecting this pin to a voltage between 0V and rent. A capacitor to ground from this pin sets the ramp 1V selects Burst Mode operation with the burst clamp set time to full output current. to the pin voltage.
SGND (Pin 8):
Signal Ground. All small-signal components
TRACK (Pin 35):
Voltage Tracking Input. Feedback volt- and compensation components should connect to this age will regulate to the voltage on this pin during start-up ground, which in turn connects to PGND at one point. power sequencing.
PGND (Pins 13, 14, 15, 17, 18, 19, 32, 33, 34, 36, 37, Exposed Pad (Pin 39):
The Exposed Pad is PGND and must
38):
Power Ground. Connect this pin closely to the (–) be soldered to the PCB ground for electrical connection terminal of CIN and COUT. and rated thermal performance. 3418fc 6 For more information www.linear.com/LTC3418 Document Outline Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts
pin FuncTions SW (Pins 1, 2, 11, 12, 20, 21, 30, 31):
Switch Node Con-
VREF (Pin 16):
Reference Output. Decouple this pin with nection to Inductor. This pin connects to the drains of the a 2.2µF capacitor. internal main and synchronous power MOSFET switches.
SVIN (Pin 24):
Signal Input Supply. Decouple this pin to
PVIN (Pins 3, 4, 9, 10, 22, 23, 28, 29):
Power Input SGND with a capacitor. Supply. Decouple these pins to PGND with capacitors on all four corners of the package.
VFB (Pin 25):
Feedback Pin. Receives the feedback volt- age from a resistive divider connected across the output.
PGOOD (Pin 5):
Power Good Output. Open-drain logic output that is pulled to ground when the output voltage
ITH (Pin 26):
Error Amplifier Compensation Point. The is not within ±7.5% of regulation point. current comparator threshold increases with this control voltage. Nominal voltage range for this pin is from 0.2V
RT (Pin 6):
Oscillator Resistor Input. Connecting a resis- to 1.4V with 0.4V corresponding to the zero-sense voltage tor to ground from this pin sets the switching frequency. (zero current).
RUN/SS (Pin 7):
Run Control and Soft-Start Input. Forcing
SYNC/MODE (Pin 27):
Mode Select and External Clock this pin below 0.5V shuts down the LTC3418. In shutdown Synchronization Input. To select Forced Continuous, tie all functions are disabled drawing <1.5µA of supply cur- to SVIN. Connecting this pin to a voltage between 0V and rent. A capacitor to ground from this pin sets the ramp 1V selects Burst Mode operation with the burst clamp set time to full output current. to the pin voltage.
SGND (Pin 8):
Signal Ground. All small-signal components
TRACK (Pin 35):
Voltage Tracking Input. Feedback volt- and compensation components should connect to this age will regulate to the voltage on this pin during start-up ground, which in turn connects to PGND at one point. power sequencing.
PGND (Pins 13, 14, 15, 17, 18, 19, 32, 33, 34, 36, 37, Exposed Pad (Pin 39):
The Exposed Pad is PGND and must
38):
Power Ground. Connect this pin closely to the (–) be soldered to the PCB ground for electrical connection terminal of CIN and COUT. and rated thermal performance. 3418fc 6 For more information www.linear.com/LTC3418 Document Outline Description Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Typical Application Related Parts
