LTC3408 UUWUAPPLICATIO S I FOR ATIO forced continuous mode, the LTC3408 will actually pull and get damaged. The faster VOUT is commanded low, the current from the output until the command from VREF is higher is the voltage spike at the input. For best results, satisfied. On alternate half cyles, this current actually exits ramp the REF pin from high to low as slow as the the VIN terminal, potentially causing a rise in VIN and application will allow. Avoid abrupt changes in voltage of forcing current into the battery. To prevent deterioration >0.2V/µs. If ramp control is unavailable, an RC filter with of the battery, use sufficient bulk capacitance with low a time constant of 10µs can be inserted between the REF ESR; at least 10µF is recommended. pin and the DAC as shown in Figure 3. Using Ceramic Input and Output Capacitors LTC3408 10k DAC REF Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple 1000pF GND current, high voltage rating and low ESR make them ideal 3408 F03 for switching regulator applications. Because the LTC3408’s control loop does not depend on the output Figure 3. Filtering the REF Pin capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and Efficiency Considerations small circuit size. The efficiency of a switching regulator is equal to the However, care must be taken when ceramic capacitors are output power divided by the input power times 100%. It is used at the input and the output. When a ceramic capacitor often useful to analyze individual losses to determine what is used at the input and the power is supplied by a wall is limiting the efficiency and which change would produce adapter through long wires, a load step at the output can the most improvement. Efficiency can be expressed as: induce ringing at the input, VIN. At best, this ringing can Efficiency = 100% – (L1 + L2 + L3 + ...) couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires where L1, L2, etc. are the individual losses as a percentage can potentially cause a voltage spike at V of input power. IN large enough to damage the part. Although all dissipative elements in the circuit produce When choosing the input and output ceramic capacitors, losses, two main sources usually account for most of the choose the X5R or X7R dielectric formulations. These losses in LTC3408 circuits: VIN quiescent current and I2R dielectrics have the best temperature and voltage charac- losses. The VIN quiescent current loss dominates the effi- teristics of all the ceramics for a given value and size. ciency loss at low load currents whereas the I2R loss domi- Ceramic capacitors of Y5V material are not recommended nates the efficiency loss at medium to high load currents. because normal operating voltages cause their bulk ca- In a typical efficiency plot, the efficiency curve at low load pacitance to become much less than the nominal value. currents can be misleading since the actual power lost is of little consequence as illustrated in Figure 4. Programming the Output Voltage With a DAC 1. The VIN quiescent current consists of two components: The output voltage can be dynamically programmed to any the DC bias current as given in the electrical characteris- voltage from 0.3V to 3.5V with an external DAC driving the tics and the internal main switch and synchronous switch REF pin. When the output is commanded low, the output gate charge currents. The gate charge current results voltage descends quickly in forced continuous mode from switching the gate capacitance of the internal power pulling current from the output and transferring it to the MOSFET switches. Each time the gate is switched from input. If the input is not connected to a low impedance high to low to high again, a packet of charge, dQ, moves source capable of absorbing the energy, the input voltage from VIN to ground. The resulting dQ/dt is typically larger could rise above the absolute maximum voltage of the part than the DC bias current. In continuous mode, 3408f 9