Datasheet LT1940, LT1940L (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Dual Monolithic 1.4A, 1.1MHz Step-Down Switching Regulator |
| Pages / Page | 20 / 5 — TYPICAL PERFOR A CE CHARACTERISTICS. RUN/SS Thresholds vs. Minimum Input … |
| File Format / Size | PDF / 288 Kb |
| Document Language | English |
TYPICAL PERFOR A CE CHARACTERISTICS. RUN/SS Thresholds vs. Minimum Input Voltage,. Temperature. VOUT = 3.3V. VOUT = 5V
Model Line for this Datasheet
Text Version of Document
LT1940/LT1940L
W U TYPICAL PERFOR A CE CHARACTERISTICS RUN/SS Thresholds vs Minimum Input Voltage, Minimum Input Voltage, Temperature VOUT = 3.3V VOUT = 5V
1.4 6.0 7.5 TA = 25°C TA = 25°C DBOOST = BAT54 DBOOST = BAT54 1.2 5.5 7.0 VIN TO START VIN TO START 1.0 5.0 6.5 BOOST DIODE TO SWITCH BOOST DIODE TIED TO OUTPUT 0.8 TIED TO OUTPUT BOOST DIODE 4.5 6.0 TIED TO INPUT 0.6 BOOST DIODE TO RUN TIED TO INPUT 4.0 5.5 0.4 RUNN/SS THRESHOLDS (V) VIN TO RUN V MINIMUM INPUT VOLTAGE (V) MINIMUM INPUT VOLTAGE (V) IN TO RUN 0.2 3.5 5.0 0 3.0 4.5 –50 –25 0 25 50 75 100 125 1 10 100 1000 1 10 100 1000 TEMPERATURE (°C) LOAD CURRENT (mA) LOAD CURRENT (mA) 1940 G13 1940 G14 1940 G14
U U U PI FU CTIO S BOOST1, BOOST2 (Pins 1, 8):
The BOOST pins are used
PG1, PG2 (Pins 11, 14):
The Power Good pins are the to provide drive voltages, higher than the input voltage, to open collector outputs of an internal comparator. PG the internal bipolar NPN power switches.Tie through a remains low until the FB pin is within 10% of the final diode from VOUT or from VIN. regulation voltage. As well as indicating output regulation, the PG pins can be used to sequence the two switching
SW1, SW2 (Pins 2, 7):
The SW pins are the outputs of the regulators. These pins can be left unconnected. The PG internal power switches. Connect these pins to the induc- outputs are valid when V tors, catch diodes and boost capacitors. IN is greater than 2.4V and either of the RUN/SS pins is high. The PG comparators are
VIN (Pins 3, 4, 5, 6):
The VIN pins supply current to the disabled in shutdown. LT1940’s internal regulator and to the internal power
RUN/SS1, RUN/SS2 (Pins 12, 13):
The RUN/SS pins are switches. These pins must be tied to the same source, and use to shut down the individual switching regulators and must be locally bypassed. the internal bias circuits. They also provide a soft-start
FB1, FB2 (Pins 9, 16):
The LT1940 regulates each feed- function. To shut down either regulator, pull the RUN/SS back pin to 1.25V. Connect the feedback resistor divider pin to ground with an open drain or collector. Tie a taps to these pins. capacitor from these pins to ground to limit switch current
V
during start-up. If neither feature is used, leave these pins
C1, VC2 (Pins 10, 15):
The VC pins are the outputs of the internal error amps. The voltages on these pins control the unconnected. peak switch currents. These pins are normally used to
GND (Pin 17):
The Exposed Pad of the package provides compensate the control loops, but can also be used to both electrical contact to ground and good thermal con- override the loops. Pull these pins to ground with an open tact to the printed circuit board. The Exposed Pad must be drain to shut down each switching regulator. soldered to the circuit board for proper operation. 1940fa 5
W U TYPICAL PERFOR A CE CHARACTERISTICS RUN/SS Thresholds vs Minimum Input Voltage, Minimum Input Voltage, Temperature VOUT = 3.3V VOUT = 5V
1.4 6.0 7.5 TA = 25°C TA = 25°C DBOOST = BAT54 DBOOST = BAT54 1.2 5.5 7.0 VIN TO START VIN TO START 1.0 5.0 6.5 BOOST DIODE TO SWITCH BOOST DIODE TIED TO OUTPUT 0.8 TIED TO OUTPUT BOOST DIODE 4.5 6.0 TIED TO INPUT 0.6 BOOST DIODE TO RUN TIED TO INPUT 4.0 5.5 0.4 RUNN/SS THRESHOLDS (V) VIN TO RUN V MINIMUM INPUT VOLTAGE (V) MINIMUM INPUT VOLTAGE (V) IN TO RUN 0.2 3.5 5.0 0 3.0 4.5 –50 –25 0 25 50 75 100 125 1 10 100 1000 1 10 100 1000 TEMPERATURE (°C) LOAD CURRENT (mA) LOAD CURRENT (mA) 1940 G13 1940 G14 1940 G14
U U U PI FU CTIO S BOOST1, BOOST2 (Pins 1, 8):
The BOOST pins are used
PG1, PG2 (Pins 11, 14):
The Power Good pins are the to provide drive voltages, higher than the input voltage, to open collector outputs of an internal comparator. PG the internal bipolar NPN power switches.Tie through a remains low until the FB pin is within 10% of the final diode from VOUT or from VIN. regulation voltage. As well as indicating output regulation, the PG pins can be used to sequence the two switching
SW1, SW2 (Pins 2, 7):
The SW pins are the outputs of the regulators. These pins can be left unconnected. The PG internal power switches. Connect these pins to the induc- outputs are valid when V tors, catch diodes and boost capacitors. IN is greater than 2.4V and either of the RUN/SS pins is high. The PG comparators are
VIN (Pins 3, 4, 5, 6):
The VIN pins supply current to the disabled in shutdown. LT1940’s internal regulator and to the internal power
RUN/SS1, RUN/SS2 (Pins 12, 13):
The RUN/SS pins are switches. These pins must be tied to the same source, and use to shut down the individual switching regulators and must be locally bypassed. the internal bias circuits. They also provide a soft-start
FB1, FB2 (Pins 9, 16):
The LT1940 regulates each feed- function. To shut down either regulator, pull the RUN/SS back pin to 1.25V. Connect the feedback resistor divider pin to ground with an open drain or collector. Tie a taps to these pins. capacitor from these pins to ground to limit switch current
V
during start-up. If neither feature is used, leave these pins
C1, VC2 (Pins 10, 15):
The VC pins are the outputs of the internal error amps. The voltages on these pins control the unconnected. peak switch currents. These pins are normally used to
GND (Pin 17):
The Exposed Pad of the package provides compensate the control loops, but can also be used to both electrical contact to ground and good thermal con- override the loops. Pull these pins to ground with an open tact to the printed circuit board. The Exposed Pad must be drain to shut down each switching regulator. soldered to the circuit board for proper operation. 1940fa 5
