Datasheet LTC3618 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Dual 4MHz, ±3A Synchronous Buck Converter for DDR Termination |
| Pages / Page | 24 / 8 — pin FuncTions (FE/UF). PHASE (Pin 1/Pin 4):. PGOOD1 (Pin 15/Pin 18):. FB2 … |
| File Format / Size | PDF / 633 Kb |
| Document Language | English |
pin FuncTions (FE/UF). PHASE (Pin 1/Pin 4):. PGOOD1 (Pin 15/Pin 18):. FB2 (Pin 2/Pin 5):. ITH2 (Pin 3/Pin 6):
Model Line for this Datasheet
Text Version of Document
LTC3618
pin FuncTions (FE/UF) PHASE (Pin 1/Pin 4):
Phase Shift Selection. If pin is tied
PGOOD1 (Pin 15/Pin 18):
Power Good Output Pin for to SGND, the phase between SW1 and SW2 will be 0°. VDDQ. The open-drain output will be pulled down to ground Tying PHASE to SVIN will select 180° phase shift. With if the FB1 voltage of the channel is not within the power the PHASE pin tied to half of the SVIN voltage, 90° phase good voltage window. The PGOOD1 will also be pulled shift will be selected. down if the channel is not enabled with the RUN1 pin or an
V
undervoltage at SVIN is detected. The power good window
FB2 (Pin 2/Pin 5):
Voltage Feedback Input Pin for VTT. See V moves in relation to the actual TRACK/SS1 pin voltage. FB1.
ITH2 (Pin 3/Pin 6):
Error Amplifier Compensation of V
SW1 (Pins 17, 16/Pins 19, 20):
VDDQ Switch Node. TT. See ITH1. Connection to the external inductor. This pin connects to the drains of the internal synchronous power MOSFET
VDDQIN (Pin 4 /Pin 7):
External Reference Input. An switches. internal resistor divider to the error amplifier sets the output voltage of V
PVIN1 (Pins 18, 19/Pins 21, 22):
VDDQ Power Supply TT. VFB2 will regulate to VDDQIN • 0.5. Inputs. These pins connect to the source of the internal
SGND (Pin 5/Pin 8):
Signal Ground. All small-signal and power P-channel MOSFET of VDDQ. PVIN1 and PVIN2 are compensation components should connect to this ground independent of each other. They may connect to equal or pin which, in turn, should be connected to PGND at one lower supplies than SVIN. point.
SVIN (Pin 20/Pin 23)
Signal Input Supply. This pin pow-
PVIN2 (Pins 6, 7/Pins 9, 10)
VTT Power Supply Input. ers the internal control circuitry and is monitored by the See PVIN1. undervoltage lockout comparator.
SW2 (Pins 8, 9/Pins 11, 12):
VTT Switch Node. See SW1.
TRACK/SS1 (Pin 21/Pin 24):
Internal, External Soft-Start,
RUN2 (Pin 10/Pin 13):
Enable Pin for V External Reference Input for V TT. See RUN1. DDQ. The type of start-up be- havior for V
RUN1 (Pin 11/Pin 14):
Enable Pin for V DDQ is programmable with the TRACK/SS1 pin: DDQ. Forcing RUN1 above the input threshold voltage enables the output SW1 1. Internal soft-start with fixed timing can be programmed of V by tying TRACK/SS1 to SV DDQ. Forcing both RUNx pins to ground shuts down IN. the LTC3618. In shutdown, all functions are disabled and 2. External soft-start can be programmed with the timing the LTC3618 draws <1µA of supply current. set by a capacitor to ground and a resistor to SVIN.
RT (Pin 12/Pin 15):
Oscillator Frequency. This pin provides 3. Tracking the start-up behavior of another supply is two modes of setting the switching frequency. programmable (see the Applications Information 1. Connecting a resistor from RT to ground will set the section). switching frequency based on the resistor value. 4. The pin can be used as external reference input. 2. Tying this pin to SVIN enables the internal 2.25MHz
ITH1 (Pin 23/Pin 2):
Error Amplifier Compensation. Con- oscillator frequency. nection for external compensation from ITH to SGND.
PGOOD2 (Pin 13/Pin 16):
Power Good Output for The current comparator’s threshold increases with this V control voltage. Tying this pin to SV TT. See PGOOD1. IN enables internal compensation.
VTTR (Pin 14 /Pin 17):
Voltage Buffer Output. This pin is the output of an internal voltage buffer whose voltage is
VFB1 (Pin 22/Pin 1):
Voltage Feedback Input Pin for equal to VDDQIN • 0.5. Output current capability is ±10mA. VDDQ. Receives the feedback voltage for VDDQ from the Do not exceed 0.1µF capacitance on this pin. This output external resistive divider across the output. is enabled/disabled by RUN2. 3618fc 8 For more information www.linear.com/LTC3618 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions (FE/UF) PHASE (Pin 1/Pin 4):
Phase Shift Selection. If pin is tied
PGOOD1 (Pin 15/Pin 18):
Power Good Output Pin for to SGND, the phase between SW1 and SW2 will be 0°. VDDQ. The open-drain output will be pulled down to ground Tying PHASE to SVIN will select 180° phase shift. With if the FB1 voltage of the channel is not within the power the PHASE pin tied to half of the SVIN voltage, 90° phase good voltage window. The PGOOD1 will also be pulled shift will be selected. down if the channel is not enabled with the RUN1 pin or an
V
undervoltage at SVIN is detected. The power good window
FB2 (Pin 2/Pin 5):
Voltage Feedback Input Pin for VTT. See V moves in relation to the actual TRACK/SS1 pin voltage. FB1.
ITH2 (Pin 3/Pin 6):
Error Amplifier Compensation of V
SW1 (Pins 17, 16/Pins 19, 20):
VDDQ Switch Node. TT. See ITH1. Connection to the external inductor. This pin connects to the drains of the internal synchronous power MOSFET
VDDQIN (Pin 4 /Pin 7):
External Reference Input. An switches. internal resistor divider to the error amplifier sets the output voltage of V
PVIN1 (Pins 18, 19/Pins 21, 22):
VDDQ Power Supply TT. VFB2 will regulate to VDDQIN • 0.5. Inputs. These pins connect to the source of the internal
SGND (Pin 5/Pin 8):
Signal Ground. All small-signal and power P-channel MOSFET of VDDQ. PVIN1 and PVIN2 are compensation components should connect to this ground independent of each other. They may connect to equal or pin which, in turn, should be connected to PGND at one lower supplies than SVIN. point.
SVIN (Pin 20/Pin 23)
Signal Input Supply. This pin pow-
PVIN2 (Pins 6, 7/Pins 9, 10)
VTT Power Supply Input. ers the internal control circuitry and is monitored by the See PVIN1. undervoltage lockout comparator.
SW2 (Pins 8, 9/Pins 11, 12):
VTT Switch Node. See SW1.
TRACK/SS1 (Pin 21/Pin 24):
Internal, External Soft-Start,
RUN2 (Pin 10/Pin 13):
Enable Pin for V External Reference Input for V TT. See RUN1. DDQ. The type of start-up be- havior for V
RUN1 (Pin 11/Pin 14):
Enable Pin for V DDQ is programmable with the TRACK/SS1 pin: DDQ. Forcing RUN1 above the input threshold voltage enables the output SW1 1. Internal soft-start with fixed timing can be programmed of V by tying TRACK/SS1 to SV DDQ. Forcing both RUNx pins to ground shuts down IN. the LTC3618. In shutdown, all functions are disabled and 2. External soft-start can be programmed with the timing the LTC3618 draws <1µA of supply current. set by a capacitor to ground and a resistor to SVIN.
RT (Pin 12/Pin 15):
Oscillator Frequency. This pin provides 3. Tracking the start-up behavior of another supply is two modes of setting the switching frequency. programmable (see the Applications Information 1. Connecting a resistor from RT to ground will set the section). switching frequency based on the resistor value. 4. The pin can be used as external reference input. 2. Tying this pin to SVIN enables the internal 2.25MHz
ITH1 (Pin 23/Pin 2):
Error Amplifier Compensation. Con- oscillator frequency. nection for external compensation from ITH to SGND.
PGOOD2 (Pin 13/Pin 16):
Power Good Output for The current comparator’s threshold increases with this V control voltage. Tying this pin to SV TT. See PGOOD1. IN enables internal compensation.
VTTR (Pin 14 /Pin 17):
Voltage Buffer Output. This pin is the output of an internal voltage buffer whose voltage is
VFB1 (Pin 22/Pin 1):
Voltage Feedback Input Pin for equal to VDDQIN • 0.5. Output current capability is ±10mA. VDDQ. Receives the feedback voltage for VDDQ from the Do not exceed 0.1µF capacitance on this pin. This output external resistive divider across the output. is enabled/disabled by RUN2. 3618fc 8 For more information www.linear.com/LTC3618 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
