ADP1850Data SheetSIMPLIFIED BLOCK DIAGRAMVINVCCOOVTHERMALLDOREF0.6VSHUTDOWNUVAGNDUVLO0.6VEN1_SW+LOGICEN2_SWEN1–+VCCOEN2–OV1LOGICSYNCUV1PH11MΩDUPLICATE FOR12kΩCHANNEL 2OSCILLATORPH2PGOOD1FREQOV+–FB1COMP10.6VERROR+–AMPLIFIERFB1UV–VDL+TRK1G+mSS1SYNCBST1+EN1_SWDH1VREF = 0.6VDRIVER LOGICOVER_LIM1CONTROL AND–STATEOV1SW1MACHINE6.5µA5V+PULSE SKIP0.9VLOGICOV1FAULT–VDL1kΩDCM+EN1 OVER_LIM1+–ZERO CROSSDL1PWMDETECTCOMPARATORRAMP1CS GAINSLOPE COMP ANDPGND1RAMP GENERATORVCCOA–V = 3, 6, 12, 24CURRENT SENSE AMPLIFIER+50µACURRENT+LIMITCONTROLOVER_LIM1–ILIM1 003 09440- Figure 2. Rev. C | Page 6 of 32 Document Outline Features Applications General Description Typical Operation Circuit Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Architecture Oscillator Frequency Modes of Operation Synchronization Synchronous Rectifier and Dead Time Input Undervoltage Lockout Internal Linear Regulator Overvoltage Protection Power Good Short-Circuit and Current-Limit Protection Shutdown Control Thermal Overload Protection Applications Information Setting the Output Voltage Soft Start Setting the Current Limit Accurate Current-Limit Sensing Setting the Slope Compensation Setting the Current Sense Gain Input Capacitor Selection Input Filter Boost Capacitor Selection Inductor Selection Output Capacitor Selection MOSFET Selection Loop Compensation (Single Phase Operation) Configuration and Loop Compensation (Dual-Phase Operation) Switching Noise and Overshoot Reduction Voltage Tracking Coincident Tracking Ratiometric Tracking Indepdendent Power Stage Input Voltage PCB Layout Guidelines MOSFETs, Input Bulk Capacitor, and Bypass Capacitor High Current and Current Sense Paths Signal Paths PGND Plane Feedback and Current-Limit Sense Paths Switch Node Gate Driver Paths Output Capacitors Typical Operating Circuits Outline Dimensions Ordering Guide