Datasheet ADP1850 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Wide Range Input, Dual/Two-Phase, DC-to-DC Synchronous Buck Controller |
| Pages / Page | 32 / 9 — Data Sheet. ADP1850. TYPICAL PERFORMANCE CHARACTERISTICS. 100. 5.10. … |
| Revision | C |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
Data Sheet. ADP1850. TYPICAL PERFORMANCE CHARACTERISTICS. 100. 5.10. 5.05. NO LOAD ON LDO. O = 3.3V, PSM. 5.00. 100mA LOAD ON LDO. 4.95. %) (
Model Line for this Datasheet
Text Version of Document
link to page 27 link to page 28
Data Sheet ADP1850 TYPICAL PERFORMANCE CHARACTERISTICS 100 5.10 90 5.05 V NO LOAD ON LDO O = 3.3V, PSM 80 5.00 100mA LOAD ON LDO 70 4.95 %) ( 60 VO = 3.3V, PWM 4.90 (V) NCY 50 E V ICI O = 1.8V, PSM CCO 4.85 F 40 V F E 4.80 30 VO = 1.8V, PWM 20 4.75 10 4.70 VIN = 12V, 600kHz 0 4.65 0.01 0.1 1 10 100
005
5 7 9 11 13 15 17
008
LOAD (A)
09440-
VIN (V)
09440- Figure 4. Efficiency Plot of Figure 44 Figure 7. LDO Line Regulation
100 6 90 5 80 VO = 5V, PSM 70 4 %) ( 60 VO = 1.8V, PSM (V) NCY 50 E O 3 C ICI F 40 VC F V E O = 5V, PWM 2 30 20 V 1 O = 1.8V, PWM 10 VIN = 12V, 750kHz 0 0 0.01 0.1 1 10
006
0 1 2 3 4 5 6
009
LOAD (A)
09440-
VIN (V)
09440- Figure 5. Efficiency Plot of Figure 45 Figure 8. VCCO vs. VIN
0 SW1 –0.05 1 –0.10 SW2 (V) O 2 C 50mA LOAD ΔVC –0.15 3 100mA LOAD SYNC 600kHz –0.20 –0.25 CH1 10V CH2 10V M1µs A CH1 5.60V
010
2.5 3.0 3.5 4.0 4.5 5.0
007
CH3 5V
09440-
VIN (V)
09440- Figure 6. LDO Load Regulation Figure 9. An Example of Synchronization, fSYNC = 600 kHz Rev. C | Page 9 of 32 Document Outline Features Applications General Description Typical Operation Circuit Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Architecture Oscillator Frequency Modes of Operation Synchronization Synchronous Rectifier and Dead Time Input Undervoltage Lockout Internal Linear Regulator Overvoltage Protection Power Good Short-Circuit and Current-Limit Protection Shutdown Control Thermal Overload Protection Applications Information Setting the Output Voltage Soft Start Setting the Current Limit Accurate Current-Limit Sensing Setting the Slope Compensation Setting the Current Sense Gain Input Capacitor Selection Input Filter Boost Capacitor Selection Inductor Selection Output Capacitor Selection MOSFET Selection Loop Compensation (Single Phase Operation) Configuration and Loop Compensation (Dual-Phase Operation) Switching Noise and Overshoot Reduction Voltage Tracking Coincident Tracking Ratiometric Tracking Indepdendent Power Stage Input Voltage PCB Layout Guidelines MOSFETs, Input Bulk Capacitor, and Bypass Capacitor High Current and Current Sense Paths Signal Paths PGND Plane Feedback and Current-Limit Sense Paths Switch Node Gate Driver Paths Output Capacitors Typical Operating Circuits Outline Dimensions Ordering Guide
Data Sheet ADP1850 TYPICAL PERFORMANCE CHARACTERISTICS 100 5.10 90 5.05 V NO LOAD ON LDO O = 3.3V, PSM 80 5.00 100mA LOAD ON LDO 70 4.95 %) ( 60 VO = 3.3V, PWM 4.90 (V) NCY 50 E V ICI O = 1.8V, PSM CCO 4.85 F 40 V F E 4.80 30 VO = 1.8V, PWM 20 4.75 10 4.70 VIN = 12V, 600kHz 0 4.65 0.01 0.1 1 10 100
005
5 7 9 11 13 15 17
008
LOAD (A)
09440-
VIN (V)
09440- Figure 4. Efficiency Plot of Figure 44 Figure 7. LDO Line Regulation
100 6 90 5 80 VO = 5V, PSM 70 4 %) ( 60 VO = 1.8V, PSM (V) NCY 50 E O 3 C ICI F 40 VC F V E O = 5V, PWM 2 30 20 V 1 O = 1.8V, PWM 10 VIN = 12V, 750kHz 0 0 0.01 0.1 1 10
006
0 1 2 3 4 5 6
009
LOAD (A)
09440-
VIN (V)
09440- Figure 5. Efficiency Plot of Figure 45 Figure 8. VCCO vs. VIN
0 SW1 –0.05 1 –0.10 SW2 (V) O 2 C 50mA LOAD ΔVC –0.15 3 100mA LOAD SYNC 600kHz –0.20 –0.25 CH1 10V CH2 10V M1µs A CH1 5.60V
010
2.5 3.0 3.5 4.0 4.5 5.0
007
CH3 5V
09440-
VIN (V)
09440- Figure 6. LDO Load Regulation Figure 9. An Example of Synchronization, fSYNC = 600 kHz Rev. C | Page 9 of 32 Document Outline Features Applications General Description Typical Operation Circuit Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Architecture Oscillator Frequency Modes of Operation Synchronization Synchronous Rectifier and Dead Time Input Undervoltage Lockout Internal Linear Regulator Overvoltage Protection Power Good Short-Circuit and Current-Limit Protection Shutdown Control Thermal Overload Protection Applications Information Setting the Output Voltage Soft Start Setting the Current Limit Accurate Current-Limit Sensing Setting the Slope Compensation Setting the Current Sense Gain Input Capacitor Selection Input Filter Boost Capacitor Selection Inductor Selection Output Capacitor Selection MOSFET Selection Loop Compensation (Single Phase Operation) Configuration and Loop Compensation (Dual-Phase Operation) Switching Noise and Overshoot Reduction Voltage Tracking Coincident Tracking Ratiometric Tracking Indepdendent Power Stage Input Voltage PCB Layout Guidelines MOSFETs, Input Bulk Capacitor, and Bypass Capacitor High Current and Current Sense Paths Signal Paths PGND Plane Feedback and Current-Limit Sense Paths Switch Node Gate Driver Paths Output Capacitors Typical Operating Circuits Outline Dimensions Ordering Guide
