Datasheet ADP1829 (Analog Devices) - 3

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Data Sheet ADP1829 SPECIFICATIONS
IN = 12 V, ENx = FREQ = PV = VREG = 5 V, SYNC = GND, TJ = −40°C to +125°C, unless otherwise specified. All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Typical values are at TA = 25°C.
Table 1. Parameter Conditions Min Typ Max Unit
POWER SUPPLY IN Input Voltage PV = VREG (using internal regulator) 5.5 20 V IN = PV = VREG (not using internal regulator) 3.0 5.5 V IN Quiescent Current Not switching, IVREG = 0 mA 1.5 3 mA IN Shutdown Current EN1 = EN2 = GND 10 20 μA VREG Undervoltage Lockout Threshold VREG rising 2.4 2.7 3.0 V VREG Undervoltage Lockout Hysteresis 0.125 V ERROR AMPLIFIER FB1, FB2 Regulation Voltage TA = 25°C, TRK1, TRK2 > 700 mV 597 600 603 mV TJ = 0°C to 85°C, TRK1, TRK2 > 700 mV 591 609 mV TJ = −40°C to +125°C, TRK1, TRK2 > 700 mV 588 612 mV TJ = 0°C to 70°C, TRK1, TRK2 > 700 mV 595 605 mV FB1, FB2 Input Bias Current 100 nA Open-Loop Voltage Gain 70 dB Gain-Bandwidth Product 20 MHz COMP1, COMP2 Sink Current 600 μA COMP1, COMP2 Source Current 120 μA COMP1, COMP2 Clamp High Voltage 2.4 V COMP1, COMP2 Clamp Low Voltage 0.75 V LINEAR REGULATOR VREG Output Voltage TA = 25°C, IVREG = 20 mA 4.85 5.0 5.15 V IN = 7 V to 18 V, IVREG = 0 mA to 100 mA 4.75 5.0 5.25 V VREG Load Regulation IVREG = 0 mA to 100 mA, IN = 12 V −40 mV VREG Line Regulation IN = 7 V to 18 V, IVREG = 20 mA 1 mV VREG Current Limit VREG = 4 V 220 mA VREG Short-Circuit Current VREG < 0.5 V 140 200 mA IN to VREG Dropout Voltage1 IVREG = 100 mA, IN < 5 V 0.7 1.4 V VREG Minimum Output Capacitance 1 μF PWM CONTROLLER PWM Ramp Voltage Peak SYNC = GND 1.3 V DH1, DH2 Maximum Duty Cycle FREQ = GND (300 kHz) 91 93 % DH1, DH2 Minimum Duty Cycle FREQ = GND (300 kHz) 1 3 % SOFT START SS1, SS2 Pull-Up Resistance SS1, SS2 = GND 90 kΩ SS1, SS2 Pull-Down Resistance SS1, SS2 = 0.6 V 6 kΩ SS1, SS2 to FB1, FB2 Offset Voltage SS1, SS2 = 0 mV to 500 mV −45 mV SS1, SS2 Pull-Up Voltage 0.8 V TRACKING TRK1, TRK2 Common-Mode Input 0 600 mV Voltage Range TRK1, TRK2 to FB1, FB2 Offset Voltage TRK1, TRK2 = 0 mV to 500 mV −5 +5 mV TRK1, TRK2 Input Bias Current 100 nA Rev. D | Page 3 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT POWER START-UP LOGIC INTERNAL LINEAR REGULATOR OSCILLATOR AND SYNCHRONIZATION ERROR AMPLIFIER SOFT START POWER OK INDICATOR TRACKING MOSFET DRIVERS CURRENT LIMIT APPLICATIONS INFORMATION SELECTING THE INPUT CAPACITOR Selecting the Output LC Filter SELECTING THE MOSFETS SETTING THE CURRENT LIMIT FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SOFT START VOLTAGE TRACKING COINCIDENT TRACKING RATIOMETRIC TRACKING Setting the Channel 2 Undervoltage Threshold for Ratiometric Tracking THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINES LFCSP PACKAGE CONSIDERATIONS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE