Datasheet ADP1829 (Analog Devices) - 6

ADP1829 Data Sheet FUNCTIONAL BLOCK DIAGRAM IN ADP1829 VREG LINEAR REG 0.6V 0.75V 0.8V REF 0.55V THERMAL UVLO SHUTDOWN VREG BST1 VREG LDOSD ILIM2 DH1 CK1 EN1 LOGIC S Q SW1 PWM EN2 PV R Q FAULT1 FAULT2 CK1 DL1 FREQ RAMP1 VREG OSCILLATOR + ILIM1 PGND1 PHASE 1 = 0° CK2 PHASE 2 = 180° 50µA – SYNC CSL1 RAMP2 RAMP1 + POK1 COMP1 – – FB1 + TRK1 0.75V + + + 0.6V – BST2 + SS1 0.8V 0.55V – DH2 CK2 S Q FAULT1 SW2 PWM PV RAMP2 + Q R COMP2 – DL2 – FB2 + VREG TRK2 0.75V + + + + PGND2 ILIM2 0.6V 50µA – – UV2 + CSL2 SS2 0.8V POK2 0.55V – FAULT2 GND BOTTOM PADDLE OF LFCSP
002 06784- Figure 2. Rev. D | Page 6 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT POWER START-UP LOGIC INTERNAL LINEAR REGULATOR OSCILLATOR AND SYNCHRONIZATION ERROR AMPLIFIER SOFT START POWER OK INDICATOR TRACKING MOSFET DRIVERS CURRENT LIMIT APPLICATIONS INFORMATION SELECTING THE INPUT CAPACITOR Selecting the Output LC Filter SELECTING THE MOSFETS SETTING THE CURRENT LIMIT FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SOFT START VOLTAGE TRACKING COINCIDENT TRACKING RATIOMETRIC TRACKING Setting the Channel 2 Undervoltage Threshold for Ratiometric Tracking THERMAL CONSIDERATIONS PCB LAYOUT GUIDELINES LFCSP PACKAGE CONSIDERATIONS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE