Datasheet LTC3802 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | Dual 550kHz Synchronous 2-Phase DC/DC Controller with Programmable Up/Down Tracking |
| Pages / Page | 28 / 4 — ELECTRICAL CHARACTERISTICS The. denotes the specifications which apply … |
| File Format / Size | PDF / 359 Kb |
| Document Language | English |
ELECTRICAL CHARACTERISTICS The. denotes the specifications which apply over the full operating
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LTC3802
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range. (Note 3) VCC = PVCC = BOOST = 5V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switcher Switching Characteristics
fOSC Oscillator Frequency PLLIN Open or VPLLIN = 0V 490 550 610 kHz VPLLLPF = 1.2V 550 kHz VPLLLPF = 0V 250 330 400 kHz VPLLLPF = 2.4V 650 750 850 kHz RPLLIN PLLIN Pull-Down Current Source 5 µA IPLLLPF Phase Detector Output Current Sourcing Capability fPLLIN > fOSC –15 µA Sinking Capability fPLLIN < fOSC 15 µA Phase TG1↓ vs PLLIN↓ PHASEMD Floats 0 Deg TG1↓ vs PLLIN↓ VPHASEMD = 5V 90 Deg TG2↓ vs PLLIN↓ PHASEMD Floats 180 Deg TG2↓ vs PLLIN↓ VPHASEMD = 5V 270 Deg VPHASEMD Shutdown Threshold ● 1.2 1.7 V Floating 2.0 V 90° Phase Threshold ● 3.5 4.0 4.5 V DCMIN Minimum TG Duty Cycle VPLLIN = 0V ● 0 % DCMAX Maximum TG Duty Cycle VPLLIN = 0V, VCMPIN = 0.6V (Note 9) ● 86 89 92 % tON(MIN) TG Minimum Pulse Width (Notes 7, 10) 50 ns BG Minimum Pulse Width VCMPIN = 0V (Note 9) 400 ns tNOV Driver Nonoverlap No Load 10 30 80 ns RDS(ON) TG High RDS(ON) IOUT = 100mA (Note 7) 1.6 2.20 Ω TG Low RDS(ON) 1.3 1.80 Ω BG High RDS(ON) 1.8 2.50 Ω BG Low RDS(ON) 0.7 1.00 Ω
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 6:
Supply current in shutdown is dominated by external MOSFET of a device may be impaired. leakage and may be significantly higher than the quiescent current drawn
Note 2:
The LTC3802 is guaranteed to meet performance specifications by the LTC3802, especially at elevated temperature. from 0°C to 70°C. Specifications over the –40°C to 85°C operating
Note 7:
Guaranteed by design, not subject to test. temperature range are assured by design, characterization and correlation
Note 8:
Rise and fall times are measured using 10% and 90% levels. Delay with statistical process controls. and nonoverlap times are measured using 50% levels.
Note 3:
All currents into device pins are positive; all currents out of device
Note 9:
If VCMPIN is less than 90% of its nominal value, BG minimum pins are negative. All voltages are referenced to ground unless otherwise pulse width is limited to 400ns. specified.
Note 10:
The LTC3802 leading edge modulation architecture does not
Note 4:
To ensure proper operation, PVCC and BVCC (VBOOST – VSW) must have a minimum TG pulse width requirement. The TG minimum pulse be greater than VGS(ON) of the external MOSFETs. width is limited by the rise and fall times.
Note 5:
Supply current in normal operation is dominated by the current needed to charge and discharge the external MOSFET gates. This current will vary with supply voltage and the external MOSFETs used. 3802f 4
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating temperature range. (Note 3) VCC = PVCC = BOOST = 5V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switcher Switching Characteristics
fOSC Oscillator Frequency PLLIN Open or VPLLIN = 0V 490 550 610 kHz VPLLLPF = 1.2V 550 kHz VPLLLPF = 0V 250 330 400 kHz VPLLLPF = 2.4V 650 750 850 kHz RPLLIN PLLIN Pull-Down Current Source 5 µA IPLLLPF Phase Detector Output Current Sourcing Capability fPLLIN > fOSC –15 µA Sinking Capability fPLLIN < fOSC 15 µA Phase TG1↓ vs PLLIN↓ PHASEMD Floats 0 Deg TG1↓ vs PLLIN↓ VPHASEMD = 5V 90 Deg TG2↓ vs PLLIN↓ PHASEMD Floats 180 Deg TG2↓ vs PLLIN↓ VPHASEMD = 5V 270 Deg VPHASEMD Shutdown Threshold ● 1.2 1.7 V Floating 2.0 V 90° Phase Threshold ● 3.5 4.0 4.5 V DCMIN Minimum TG Duty Cycle VPLLIN = 0V ● 0 % DCMAX Maximum TG Duty Cycle VPLLIN = 0V, VCMPIN = 0.6V (Note 9) ● 86 89 92 % tON(MIN) TG Minimum Pulse Width (Notes 7, 10) 50 ns BG Minimum Pulse Width VCMPIN = 0V (Note 9) 400 ns tNOV Driver Nonoverlap No Load 10 30 80 ns RDS(ON) TG High RDS(ON) IOUT = 100mA (Note 7) 1.6 2.20 Ω TG Low RDS(ON) 1.3 1.80 Ω BG High RDS(ON) 1.8 2.50 Ω BG Low RDS(ON) 0.7 1.00 Ω
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 6:
Supply current in shutdown is dominated by external MOSFET of a device may be impaired. leakage and may be significantly higher than the quiescent current drawn
Note 2:
The LTC3802 is guaranteed to meet performance specifications by the LTC3802, especially at elevated temperature. from 0°C to 70°C. Specifications over the –40°C to 85°C operating
Note 7:
Guaranteed by design, not subject to test. temperature range are assured by design, characterization and correlation
Note 8:
Rise and fall times are measured using 10% and 90% levels. Delay with statistical process controls. and nonoverlap times are measured using 50% levels.
Note 3:
All currents into device pins are positive; all currents out of device
Note 9:
If VCMPIN is less than 90% of its nominal value, BG minimum pins are negative. All voltages are referenced to ground unless otherwise pulse width is limited to 400ns. specified.
Note 10:
The LTC3802 leading edge modulation architecture does not
Note 4:
To ensure proper operation, PVCC and BVCC (VBOOST – VSW) must have a minimum TG pulse width requirement. The TG minimum pulse be greater than VGS(ON) of the external MOSFETs. width is limited by the rise and fall times.
Note 5:
Supply current in normal operation is dominated by the current needed to charge and discharge the external MOSFET gates. This current will vary with supply voltage and the external MOSFETs used. 3802f 4
