Datasheet LTC3728L, LTC3728LX (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Dual, 550kHz, 2-Phase Synchronous Regulators |
| Pages / Page | 38 / 10 — pin FuncTions. VOSENSE1, VOSENSE2:. TG2, TG1:. PLLFLTR:. SW2, SW1:. … |
| File Format / Size | PDF / 466 Kb |
| Document Language | English |
pin FuncTions. VOSENSE1, VOSENSE2:. TG2, TG1:. PLLFLTR:. SW2, SW1:. PLLIN:. BOOST2, BOOST1:. FCB:. BG2, BG1:. PGND:. ITH1, ITH2:. INTVCC:
Model Line for this Datasheet
Text Version of Document
LTC3728L/LTC3728LX
pin FuncTions VOSENSE1, VOSENSE2:
Error Amplifier Feedback Input.
TG2, TG1:
High Current Gate Drives for Top N-Channel Receives the remotely sensed feedback voltage for each MOSFETs. These are the outputs of floating drivers with controller from an external resistive divider across the a voltage swing equal to INTVCC – 0.5V superimposed on output. the switch node voltage SW.
PLLFLTR:
Filter Connection for Phase-Locked Loop. Alter-
SW2, SW1:
Switch Node Connections to Inductors. Voltage natively, this pin can be driven with an AC or DC voltage swing at these pins is from a Schottky diode (external) source to vary the frequency of the internal oscillator. voltage drop below ground to VIN.
PLLIN:
External Synchronization Input to Phase Detector.
BOOST2, BOOST1:
Bootstrapped Supplies to the Top- This pin is internally terminated to SGND with 50kΩ. The side Floating Drivers. Capacitors are connected between phase-locked loop will force the rising top gate signal of the boost and switch pins and Schottky diodes are tied controller 1 to be synchronized with the rising edge of between the boost and INTVCC pins. Voltage swing at the the PLLIN signal. boost pins is from INTVCC to (VIN + INTVCC).
FCB:
Forced Continuous Control Input. This input acts
BG2, BG1:
High Current Gate Drives for Bottom (Synchro- on both controllers and is normally used to regulate a nous) N-Channel MOSFETs. Voltage swing at these pins secondary winding. Pulling this pin below 0.8V will force is from ground to INTVCC. continuous synchronous operation.
PGND:
Driver Power Ground. Connects to the sources
ITH1, ITH2:
Error Amplifier Output and Switching Regulator of bottom (synchronous) N-channel MOSFETs, anodes Compensation Point. Each associated channels’ current of the Schottky rectifiers and the (–) terminal(s) of CIN. comparator trip point increases with this control voltage.
INTVCC:
Output of the Internal 5V Linear Low Dropout
SGND:
Small Signal Ground. Common to both con- Regulator and the EXTVCC Switch. The driver and control trollers, this pin must be routed separately from high circuits are powered from this voltage source. Must be current grounds to the common (–) terminals of the COUT decoupled to power ground with a minimum of 4.7µF capacitors. tantalum or other low ESR capacitor.
3.3VOUT:
Linear Regulator Output. Capable of supplying
EXTVCC:
External Power Input to an Internal Switch 10mA DC with peak currents as high as 50mA. Connected to INTVCC. This switch closes and supplies
NC:
No Connect. VCC power, bypassing the internal low dropout regulator, whenever EXTVCC is higher than 4.7V. See EXTVCC connec-
SENSE2–, SENSE1–:
The (–) Input to the Differential Cur- tion in Applications section. Do not exceed 7V on this pin. rent Comparators.
VIN:
Main Supply Pin. A bypass capacitor should be tied
SENSE2+, SENSE1+:
The (+) Input to the Differential Current between this pin and the signal ground pin. Comparators. The ITH pin voltage and controlled offsets between the SENSE– and SENSE+ pins in conjunction with
PGOOD:
Open-Drain Logic Output. PGOOD is pulled to R ground when the voltage on either VOSENSE pin is not SENSE set the current trip threshold. within ±7.5% of its set point.
RUN/SS2, RUN/SS1:
Combination of soft-start, run control inputs and short-circuit detection timers. A capacitor to
Exposed Pad (UH Package Only)
: Signal Ground. Must ground at each of these pins sets the ramp time to full be soldered to the PCB, providing a local ground for the output current. Forcing either of these pins back below control components of the IC, and be tied to the PGND 1.0V causes the IC to shut down the circuitry required for pin under the IC. that particular controller. Latchoff overcurrent protection is also invoked via this pin as described in the Applications Information section. 3728lxff 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
pin FuncTions VOSENSE1, VOSENSE2:
Error Amplifier Feedback Input.
TG2, TG1:
High Current Gate Drives for Top N-Channel Receives the remotely sensed feedback voltage for each MOSFETs. These are the outputs of floating drivers with controller from an external resistive divider across the a voltage swing equal to INTVCC – 0.5V superimposed on output. the switch node voltage SW.
PLLFLTR:
Filter Connection for Phase-Locked Loop. Alter-
SW2, SW1:
Switch Node Connections to Inductors. Voltage natively, this pin can be driven with an AC or DC voltage swing at these pins is from a Schottky diode (external) source to vary the frequency of the internal oscillator. voltage drop below ground to VIN.
PLLIN:
External Synchronization Input to Phase Detector.
BOOST2, BOOST1:
Bootstrapped Supplies to the Top- This pin is internally terminated to SGND with 50kΩ. The side Floating Drivers. Capacitors are connected between phase-locked loop will force the rising top gate signal of the boost and switch pins and Schottky diodes are tied controller 1 to be synchronized with the rising edge of between the boost and INTVCC pins. Voltage swing at the the PLLIN signal. boost pins is from INTVCC to (VIN + INTVCC).
FCB:
Forced Continuous Control Input. This input acts
BG2, BG1:
High Current Gate Drives for Bottom (Synchro- on both controllers and is normally used to regulate a nous) N-Channel MOSFETs. Voltage swing at these pins secondary winding. Pulling this pin below 0.8V will force is from ground to INTVCC. continuous synchronous operation.
PGND:
Driver Power Ground. Connects to the sources
ITH1, ITH2:
Error Amplifier Output and Switching Regulator of bottom (synchronous) N-channel MOSFETs, anodes Compensation Point. Each associated channels’ current of the Schottky rectifiers and the (–) terminal(s) of CIN. comparator trip point increases with this control voltage.
INTVCC:
Output of the Internal 5V Linear Low Dropout
SGND:
Small Signal Ground. Common to both con- Regulator and the EXTVCC Switch. The driver and control trollers, this pin must be routed separately from high circuits are powered from this voltage source. Must be current grounds to the common (–) terminals of the COUT decoupled to power ground with a minimum of 4.7µF capacitors. tantalum or other low ESR capacitor.
3.3VOUT:
Linear Regulator Output. Capable of supplying
EXTVCC:
External Power Input to an Internal Switch 10mA DC with peak currents as high as 50mA. Connected to INTVCC. This switch closes and supplies
NC:
No Connect. VCC power, bypassing the internal low dropout regulator, whenever EXTVCC is higher than 4.7V. See EXTVCC connec-
SENSE2–, SENSE1–:
The (–) Input to the Differential Cur- tion in Applications section. Do not exceed 7V on this pin. rent Comparators.
VIN:
Main Supply Pin. A bypass capacitor should be tied
SENSE2+, SENSE1+:
The (+) Input to the Differential Current between this pin and the signal ground pin. Comparators. The ITH pin voltage and controlled offsets between the SENSE– and SENSE+ pins in conjunction with
PGOOD:
Open-Drain Logic Output. PGOOD is pulled to R ground when the voltage on either VOSENSE pin is not SENSE set the current trip threshold. within ±7.5% of its set point.
RUN/SS2, RUN/SS1:
Combination of soft-start, run control inputs and short-circuit detection timers. A capacitor to
Exposed Pad (UH Package Only)
: Signal Ground. Must ground at each of these pins sets the ramp time to full be soldered to the PCB, providing a local ground for the output current. Forcing either of these pins back below control components of the IC, and be tied to the PGND 1.0V causes the IC to shut down the circuitry required for pin under the IC. that particular controller. Latchoff overcurrent protection is also invoked via this pin as described in the Applications Information section. 3728lxff 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
