Datasheet LTM2887 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | SPI/Digital or I2C μModule Isolator with Dual Adjustable 5V Regulators |
| Pages / Page | 38 / 10 — PIN FUNCTIONS. LTM2887-I Logic Side. LTM2887-I Isolated Side. DO2 (A1):. … |
| File Format / Size | PDF / 600 Kb |
| Document Language | English |
PIN FUNCTIONS. LTM2887-I Logic Side. LTM2887-I Isolated Side. DO2 (A1):. I2 (L1):. DNC (A2):. DNC (L2):. SCL (A3):. SCL2 (L3):. SDA (A4):
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Text Version of Document
LTM2887
PIN FUNCTIONS LTM2887-I Logic Side LTM2887-I Isolated Side DO2 (A1):
Digital Output, Referenced to VL and GND. Logic
I2 (L1):
Digital Input, Referenced to VL2 and GND2. Logic output connected to I2 through isolation barrier. Under input connected to DO2 through isolation barrier. The logic the condition of an isolation communication failure this state on I2 translates to the same logic state on DO2. Do output is in a high impedance state. not float.
DNC (A2):
Do Not Connect. Pin connected internally.
DNC (L2):
Do Not Connect. Pin connected internally.
SCL (A3):
Serial I2C Clock Input, Referenced to VL and
SCL2 (L3):
Serial I2C Clock Output, Referenced to VL2 and GND. Logic input connected to isolated side SCL2 pin GND2. Logic output connected to logic side SCL pin through through isolation barrier. Clock is unidirectional from logic isolation barrier. Clock is unidirectional from logic to isolated to isolated side. Do not float. side. SCL2 has a push-pull output stage, do not connect an external pull-up device. Under the condition of an isolation
SDA (A4):
Serial I2C Data Pin, Referenced to VL and GND. communication failure this output defaults to a high state. Bidirectional logic pin connected to isolated side SDA2 pin through isolation barrier. Under the condition of an isola-
SDA2 (L4):
Serial I2C Data Pin, Referenced to VL2 and tion communication failure this pin is in a high impedance GND2. Bidirectional logic pin connected to logic side SDA state. Do not float. pin through isolation barrier. Output is biased high by a 1.8mA current source. Do not connect an external pull-
DI1 (A5):
Digital Input, Referenced to VL and GND. Logic up device to SDA2. Under the condition of an isolation input connected to O1 through isolation barrier. The logic communication failure this output defaults to a high state. state on DI1 translates to the same logic state on O1. Do not float.
O1 (L5):
Digital Output, Referenced to VL2 and GND2. Logic output connected to DI1 through isolation barrier.
GND (A6, B2 to B6):
Circuit Ground. Under the condition of an isolation communication failure
ON (A7):
Enable, Referenced to V O1 defaults to a high state. L and GND. Enables power and data communication through the isolation
VL2 (L6):
3V to 5.5V Adjustable Isolated Supply Voltage. barrier. If ON is high the part is enabled and power and Internally generated from VCC by an isolated DC/DC con- communications are functional to the isolated side. If ON verter and regulated to 5V with no external components. is low the logic side is held in reset, all digital outputs Internally bypassed with 4.7µF. are in a high impedance state, and the isolated side is
IV
unpowered. Do not float.
CC2 (L7):
VCC2 precision current limit adjust pin. Current limit threshold is set by connecting a resistor between
VL (A8):
Logic Supply. Interface supply voltage for pins IVCC2 and GND2. For detailed information on how to set DI1, SCL, SDA, DO1, DO2, and ON. Operating voltage is the current limit resistor value, see the Application Infor- 1.62V to 5.5V. Internally bypassed with 1µF. mation section. If not used, tie IVCC2 to GND2. Internally
DO1 (B1):
Digital Output, Referenced to V bypassed with 10nF. L and GND. Logic output connected to I1 through isolation barrier. Under
VCC2 (L8):
0.6V to 5.5V Adjustable Isolated Supply Volt- the condition of an isolation communication failure this age. Internally generated from VCC by an isolated DC/DC output is in a high impedance state. converter and regulated to 5V with no external components. Internally bypassed with 4.7µF.
VCC (B7 to B8):
Supply Voltage. Operating voltage is 3V to 3.6V for LTM2887-3 and 4.5V to 5.5V for LTM2887-5.
I1 (K1):
Digital Input, Referenced to VL2 and GND2. Logic Internally bypassed with 2.2µF. input connected to DO1 through isolation barrier. The logic state on I1 translates to the same logic state on DO1. Do not float.
GND2 (K2 to K5):
Isolated Ground. 2887fb 10 For more information www.linear.com/LTM2887 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Product Selection Guide Order Information Electrical Characteristics Switching Characteristics Isolation Characteristics Typical Performance Characteristics Pin Functions Block Diagrams Test Circuits Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS LTM2887-I Logic Side LTM2887-I Isolated Side DO2 (A1):
Digital Output, Referenced to VL and GND. Logic
I2 (L1):
Digital Input, Referenced to VL2 and GND2. Logic output connected to I2 through isolation barrier. Under input connected to DO2 through isolation barrier. The logic the condition of an isolation communication failure this state on I2 translates to the same logic state on DO2. Do output is in a high impedance state. not float.
DNC (A2):
Do Not Connect. Pin connected internally.
DNC (L2):
Do Not Connect. Pin connected internally.
SCL (A3):
Serial I2C Clock Input, Referenced to VL and
SCL2 (L3):
Serial I2C Clock Output, Referenced to VL2 and GND. Logic input connected to isolated side SCL2 pin GND2. Logic output connected to logic side SCL pin through through isolation barrier. Clock is unidirectional from logic isolation barrier. Clock is unidirectional from logic to isolated to isolated side. Do not float. side. SCL2 has a push-pull output stage, do not connect an external pull-up device. Under the condition of an isolation
SDA (A4):
Serial I2C Data Pin, Referenced to VL and GND. communication failure this output defaults to a high state. Bidirectional logic pin connected to isolated side SDA2 pin through isolation barrier. Under the condition of an isola-
SDA2 (L4):
Serial I2C Data Pin, Referenced to VL2 and tion communication failure this pin is in a high impedance GND2. Bidirectional logic pin connected to logic side SDA state. Do not float. pin through isolation barrier. Output is biased high by a 1.8mA current source. Do not connect an external pull-
DI1 (A5):
Digital Input, Referenced to VL and GND. Logic up device to SDA2. Under the condition of an isolation input connected to O1 through isolation barrier. The logic communication failure this output defaults to a high state. state on DI1 translates to the same logic state on O1. Do not float.
O1 (L5):
Digital Output, Referenced to VL2 and GND2. Logic output connected to DI1 through isolation barrier.
GND (A6, B2 to B6):
Circuit Ground. Under the condition of an isolation communication failure
ON (A7):
Enable, Referenced to V O1 defaults to a high state. L and GND. Enables power and data communication through the isolation
VL2 (L6):
3V to 5.5V Adjustable Isolated Supply Voltage. barrier. If ON is high the part is enabled and power and Internally generated from VCC by an isolated DC/DC con- communications are functional to the isolated side. If ON verter and regulated to 5V with no external components. is low the logic side is held in reset, all digital outputs Internally bypassed with 4.7µF. are in a high impedance state, and the isolated side is
IV
unpowered. Do not float.
CC2 (L7):
VCC2 precision current limit adjust pin. Current limit threshold is set by connecting a resistor between
VL (A8):
Logic Supply. Interface supply voltage for pins IVCC2 and GND2. For detailed information on how to set DI1, SCL, SDA, DO1, DO2, and ON. Operating voltage is the current limit resistor value, see the Application Infor- 1.62V to 5.5V. Internally bypassed with 1µF. mation section. If not used, tie IVCC2 to GND2. Internally
DO1 (B1):
Digital Output, Referenced to V bypassed with 10nF. L and GND. Logic output connected to I1 through isolation barrier. Under
VCC2 (L8):
0.6V to 5.5V Adjustable Isolated Supply Volt- the condition of an isolation communication failure this age. Internally generated from VCC by an isolated DC/DC output is in a high impedance state. converter and regulated to 5V with no external components. Internally bypassed with 4.7µF.
VCC (B7 to B8):
Supply Voltage. Operating voltage is 3V to 3.6V for LTM2887-3 and 4.5V to 5.5V for LTM2887-5.
I1 (K1):
Digital Input, Referenced to VL2 and GND2. Logic Internally bypassed with 2.2µF. input connected to DO1 through isolation barrier. The logic state on I1 translates to the same logic state on DO1. Do not float.
GND2 (K2 to K5):
Isolated Ground. 2887fb 10 For more information www.linear.com/LTM2887 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Product Selection Guide Order Information Electrical Characteristics Switching Characteristics Isolation Characteristics Typical Performance Characteristics Pin Functions Block Diagrams Test Circuits Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
