Datasheet BridgeSwitch Family (Power Integrations) - 6

BridgeSwitch
0.085
LS(MIN)
tBPLC
PI-8310-080918
VHD
ty Ratio D
0.080 VBPL tINLS 0.075 VINL f(PWM) 20000 16000 0.070 10000 6000 1000 VHB 500 100 0.065
Minimum Low-Side Commutation Du
0.1 1 10 100
BPH Pin Capacitance (
µ
F)
VBPH Figure 8. Minimum Low-Side Commutation Duty Ratio vs. BYPASS HIGH-SIDE Pin Capacitance and Low-Side PWM Frequency to Ensure Sufficient High-Side Self-Supply Current (High-Side Commutation Duty Ratio ≤ 0.95). VFAULT The BYPASS HIGH-SIDE pin capacitor recharges every time the low-side power FREDFET turns on. To ensure sufficient high-side self-supply current, the low-side power FREDFET on-time, as a function of chosen BYPASS HIGH-SIDE capacitance, low-side commutation duty ratio D and PWM frequency, should meet the t t LS 0 t1 t2 3 t4 minimum low-side commutation duty ratio requirement D shown LS(MIN) in Figure 8. Note the maximum recommended voltage ripple of PI-8297-120117 250 mV across the bypass high-side capacitor restricts the choice of possible capacitance values at lower PWM frequencies. Figure 9. Recommended Power-Up Sequence with Self-supplied Operation. Minimum low-side commutation duty ratio D depicted in Figure 8 LS(MIN) scales with the applicable maximum high-side commutation duty ratio in a given application. For example, the minimum low-side commuta- tion duty ratio D in an application operating at f = 6 kHz and LS(MIN) PWM a maximum high-side commutation duty ratio of D = 0.95 is HS(MAX) D = 0.0435. D increases by a factor of 0.99/0.95 to D* LS(MIN) LS(MIN) LS(MIN) = 0.0453 if the same application operates for instance at a maximum high-side duty ratio of D* = 0.99. HS(MAX)
Time Point Activity
t • High-voltage DC bus is applied 0 • Internal current source starts charging BPL pin capacitor once HD pin voltage reaches V t HD(START) 1 • System MCU may start setting low-side power FREDFET control signal INL to high • BPL pin voltage reaches V (typical y 14.5 V) BPL • Device determines external device settings t • Internal Gate drive logic turns on low-side power FREDFET after device setup completes and once INL becomes high or 2 if it is high already • Internal current source starts charging BPH pin capacitor • BPH pin voltage reaches V with respect to HB pin (typical y 14.5 V). BPH t • Device starts communicating successful power-up through FAULT pin. 3 Note: The device does not send a status update if the internal power-up sequence did not complete successfully. t • BridgeSwitch is ready for state operation (indicated by communicated status update starting at time point t ) 3 4 • System MCU turns off low-side power FREDFET Table 2. Power-Up Sequence with Self-Supplied Operation.
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Rev. F 11/18 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description BridgeSwitch Functional Description Application Example PCB Design Guidelines Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics inSOP-24C Package Drawing Package Marking Part Ordering and MSL Table ESD and Latch-Up Table Part Ordering Information