Data SheetAD5116000x200x20–10–100x100x100x080x08–20–200x040x040x02B)B)–30d0x02d0x01–30N (0x01N (0x00AIAIG–40G–400x00–50–50–60–60–7010k100k1M10M100M 014 10k100k1M10M 017 FREQUENCY (Hz) 09657- FREQUENCY (Hz) 09657- Figure 14. 5 kΩ Gain vs. Frequency vs. Code Figure 17. 10 kΩ Gain vs. Frequency vs. Code 000x20–10 0x10–100x08–200x04–200x02–30–30rees)B)0x01d–400x00DegN ((–40AIEG–50HAS–50P–60–60RAB = 10kΩ–70–70FULL SCALE HALF SCALE QUARTER SCALE–80–8010k100k1M 015 10k100k1M10M 018 FREQUENCY (Hz) 09657- FREQUENCY (Hz) 09657- Figure 15. 80 kΩ Gain vs. Frequency vs. Code Figure 18. Normalized Phase Flatness vs. Frequency 200V200DD = 5VV)DD = 5V18010kΩC10kΩ80kΩ180/°80kΩ) 1605kΩC5kΩ/°ppm160140O ( Cppm140PO (M120C120PTE EM 100100ODTE EM80R80ODTE60ET M60TA40TIOM40OSNE H20OTE20RP000102030405060 016 0102030405060 019 CODE (Decimal) 09657- CODE (Decimal) 09657- Figure 16. Rheostat Mode Tempco ΔRWB/ΔT vs. Code Figure 19. Potentiometer Mode Tempco ΔRWB/ΔT vs. Code Rev. B | Page 9 of 16 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Interface Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Theory of Operation RDAC Register Manual Increment Auto Scan Increment Low Wiper Resistance Feature EEPROM Automatic Save Enable Auto Save Manual Store End Scale Resistance Indicator RDAC Architecture Top Scale/Bottom Scale Architecture Programming the Variable Resistor Rheostat Operation—±8% Resistor Tolerance Programming the Potentiometer Divider Voltage Output Operation Terminal Voltage Operating Range Power-Up Sequence Layout and Power Supply Biasing Outline Dimensions Ordering Guide