X9418 Datasheet (Renesas) - 2
| Manufacturer | Renesas |
| Description | Low Noise/Low Power/2-Wire Bus |
| Pages / Page | 20 / 2 — Ordering Information. POTENTIOMET. TEMPERATU. VCC LIMITS ORGANIZATION RE … |
| Revision | 2.00 |
| File Format / Size | PDF / 841 Kb |
| Document Language | English |
Ordering Information. POTENTIOMET. TEMPERATU. VCC LIMITS ORGANIZATION RE RANGE. PART NUMBER. PART MARKING. (V). (°C). PACKAGE
Model Line for this Datasheet
Text Version of Document
X9418
Ordering Information POTENTIOMET ER TEMPERATU VCC LIMITS ORGANIZATION RE RANGE PART NUMBER PART MARKING (V) (k ) (°C) PACKAGE PKG. DWG. #
X9418WV24* X9418WV 5 ±10% 10 0 to +70 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24Z* (Note) X9418WV Z 0 to +70 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418WP24I-2.7 X9418WP G 2.7 to 5.5 10 -40 to +85 24 Ld PDIP E24.6 X9418WS24I-2.7 X9418WS G -40 to +85 24 Ld SOIC (300MIL) M24.3 X9418WS24IZ-2.7 (Note) X9418WS ZG -40 to +85 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418WV24-2.7* X9418WV F 0 to +70 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24Z-2.7* (Note) X9418WV ZF 0 to +70 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418WV24I-2.7 X9418WV G -40 to +85 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24IZ-2.7 (Note) X9418WV ZG -40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418YS24-2.7 X9418YS F 2.5 0 to +70 24 Ld SOIC (300MIL) M24.3 X9418YS24Z-2.7 (Note) X9418YS ZF 0 to +70 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418YS24I-2.7 X9418YS G -40 to +85 24 Ld SOIC (300MIL) M24.3 X9418YS24IZ-2.7 (Note) X9418YS ZG -40 to +85 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418YV24I-2.7* X9418YV G -40 to +85 24 Ld TSSOP (4.4MM) MDP0044 X9418YV24IZ-2.7* (Note) X9418YV ZG -40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN DESCRIPTIONS Potentiometer Pins Host Interface Pins VH/RH (VH0/RH0 - VH1/RH1), VL/RL (VL0/RL0 - VL1/RL1)
The VH/RH and VL/RL inputs are equivalent to the
Serial Clock (SCL)
terminal connections on either end of a mechanical The SCL input is used to clock data into and out of the potentiometer. X9418.
VW/RW (VW0/RW0 - VW1/RW1) Serial Data (SDA)
The wiper outputs are equivalent to the wiper output of a SDA is a bidirectional pin used to transfer data into and mechanical potentiometer. out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open
Hardware Write Protect Input (WP)
collector outputs. An open drain output requires the use The WP pin when low prevents nonvolatile writes to the of a pull-up resistor. For selecting typical values, refer to Data Registers. the guidelines for calculating typical values on the bus pull-up resistors graph.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages for
Device Address (A0 - A3)
the XDCP analog section. The Address inputs are used to set the least significant 4 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Address input in order to initiate communication with the X9418. A maximum of 16 devices may occupy the 2- wire serial bus. FN8194 Rev 2.00 Page 2 of 20 October 12, 2006
Ordering Information POTENTIOMET ER TEMPERATU VCC LIMITS ORGANIZATION RE RANGE PART NUMBER PART MARKING (V) (k ) (°C) PACKAGE PKG. DWG. #
X9418WV24* X9418WV 5 ±10% 10 0 to +70 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24Z* (Note) X9418WV Z 0 to +70 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418WP24I-2.7 X9418WP G 2.7 to 5.5 10 -40 to +85 24 Ld PDIP E24.6 X9418WS24I-2.7 X9418WS G -40 to +85 24 Ld SOIC (300MIL) M24.3 X9418WS24IZ-2.7 (Note) X9418WS ZG -40 to +85 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418WV24-2.7* X9418WV F 0 to +70 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24Z-2.7* (Note) X9418WV ZF 0 to +70 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418WV24I-2.7 X9418WV G -40 to +85 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24IZ-2.7 (Note) X9418WV ZG -40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418YS24-2.7 X9418YS F 2.5 0 to +70 24 Ld SOIC (300MIL) M24.3 X9418YS24Z-2.7 (Note) X9418YS ZF 0 to +70 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418YS24I-2.7 X9418YS G -40 to +85 24 Ld SOIC (300MIL) M24.3 X9418YS24IZ-2.7 (Note) X9418YS ZG -40 to +85 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418YV24I-2.7* X9418YV G -40 to +85 24 Ld TSSOP (4.4MM) MDP0044 X9418YV24IZ-2.7* (Note) X9418YV ZG -40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN DESCRIPTIONS Potentiometer Pins Host Interface Pins VH/RH (VH0/RH0 - VH1/RH1), VL/RL (VL0/RL0 - VL1/RL1)
The VH/RH and VL/RL inputs are equivalent to the
Serial Clock (SCL)
terminal connections on either end of a mechanical The SCL input is used to clock data into and out of the potentiometer. X9418.
VW/RW (VW0/RW0 - VW1/RW1) Serial Data (SDA)
The wiper outputs are equivalent to the wiper output of a SDA is a bidirectional pin used to transfer data into and mechanical potentiometer. out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open
Hardware Write Protect Input (WP)
collector outputs. An open drain output requires the use The WP pin when low prevents nonvolatile writes to the of a pull-up resistor. For selecting typical values, refer to Data Registers. the guidelines for calculating typical values on the bus pull-up resistors graph.
Analog Supplies V+, V-
The Analog Supplies V+, V- are the supply voltages for
Device Address (A0 - A3)
the XDCP analog section. The Address inputs are used to set the least significant 4 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Address input in order to initiate communication with the X9418. A maximum of 16 devices may occupy the 2- wire serial bus. FN8194 Rev 2.00 Page 2 of 20 October 12, 2006
