Datasheet EFR32MG21 (Silicon Labs) - 2
| Manufacturer | Silicon Labs |
| Description | Mighty Gecko Multiprotocol Wireless SoC Family |
| Pages / Page | 75 / 2 — 1. Feature List. Low Power Wireless System-on-Chip. Wide selection of MCU … |
| File Format / Size | PDF / 973 Kb |
| Document Language | English |
1. Feature List. Low Power Wireless System-on-Chip. Wide selection of MCU peripherals. Low Energy Consumption
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EFR32MG21 Mighty Gecko Multiprotocol Wireless SoC Family Data Sheet Feature List
1. Feature List
The EFR32MG21 highlighted features are listed below. •
Low Power Wireless System-on-Chip
•
Wide selection of MCU peripherals
• High Performance 32-bit 80 MHz ARM Cortex®-M33 with • 12-bit 1 Msps SAR Analog to Digital Converter (ADC) DSP instruction and floating-point unit for efficient signal • 2 × Analog Comparator (ACMP) processing • Up to 20 General Purpose I/O pins with output state reten- • Up to 1024 kB flash program memory tion and asynchronous interrupts • Up to 96 kB RAM data memory • 8 Channel DMA Controller • 2.4 GHz radio operation • 12 Channel Peripheral Reflex System (PRS) • TX power up to 20 dBm • 2 × 16-bit Timer/Counter •
Low Energy Consumption
• 3 Compare/Capture/PWM channels • 8.8 mA RX current at 2.4 GHz (1 Mbps GFSK) • 1 × 32-bit Timer/Counter • 9.4 mA RX current at 2.4 GHz (250 kbps O-QPSK DSSS) • 3 Compare/Capture/PWM channels • 9.3 mA TX current @ 0 dBm output power at 2.4 GHz • 32-bit Real Time Counter • 33.8 mA TX current @ 10 dBm output power at 2.4 GHz • 24-bit Low Energy Timer for waveform generation • 50.9 μA/MHz in Active Mode (EM0) • 2 × Watchdog Timer • 5.0 μA EM2 DeepSleep current • 3 × Universal Synchronous/Asynchronous Receiver/Trans- mitter (UART/SPI/SmartCard(ISO 7816)/IrDA/I2S) (96 kB RAM retention and RTC running from LFXO) • • 4.5 μA EM2 DeepSleep current 2 × I2C interface with SMBus support •
Wide Operating Range
(16 kB RAM retention and RTC running from LFRCO) • 1.71 V to 3.8 V single power supply •
High Receiver Performance
• -40°C to 125°C ambient • -104.5 dBm sensitivity @ 250 kbps O-QPSK DSSS •
Standard Security
• -97.5 dBm sensitivity @ 1 Mbit/s GFSK • Hardware Cryptographic Acceleration for AES128/256, • -94.4 dBm sensitivity @ 2 Mbit/s GFSK SHA-1, SHA-2 (up to 256-bit), ECC (up to 256-bit), ECDSA • -104.9 dBm sensitivity @ 125 kbps GFSK (up to 256-bit), ECDH, and J-Pake. •
Supported Modulation Formats
• True Random Number Generator (TRNG) • GFSK • ARM TrustZone • OQPSK • Secure Boot •
Protocol Support
• Secure Debug Unlock • Bluetooth Low Energy (Bluetooth 5) •
QFN32 4x4 mm Package
• Zigbee • 0.4 mm pitch • Thread
silabs.com
| Building a more connected world. Rev. 1.0 | 2 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Radio 3.2.1 Antenna Interface 3.2.2 Fractional-N Frequency Synthesizer 3.2.3 Receiver Architecture 3.2.4 Transmitter Architecture 3.2.5 Packet and State Trace 3.2.6 Data Buffering 3.2.7 Radio Controller (RAC) 3.3 General Purpose Input/Output (GPIO) 3.4 Clocking 3.4.1 Clock Management Unit (CMU) 3.4.2 Internal and External Oscillators 3.5 Counters/Timers and PWM 3.5.1 Timer/Counter (TIMER) 3.5.2 Low Energy Timer (LETIMER) 3.5.3 Real Time Clock with Capture (RTCC) 3.5.4 Back-Up Real Time Counter 3.5.5 Watchdog Timer (WDOG) 3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.6.2 Inter-Integrated Circuit Interface (I2C) 3.6.3 Peripheral Reflex System (PRS) 3.7 Security Features 3.7.1 Standard Security 3.7.2 True Random Number Generator 3.8 Analog 3.8.1 Analog Comparator (ACMP) 3.8.2 Analog to Digital Converter (ADC) 3.9 Reset Management Unit (RMU) 3.10 Core and Memory 3.10.1 Processor Core 3.10.2 Memory System Controller (MSC) 3.10.3 Linked Direct Memory Access Controller (LDMA) 3.11 Memory Map 3.12 Configuration Summary 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Absolute Maximum Ratings 4.1.2 General Operating Conditions 4.1.3 Thermal Characteristics 4.1.4 Current Consumption 4.1.4.1 MCU current consumption at 1.8V 4.1.4.2 MCU current consumption at 3.0V 4.1.4.3 Radio current consumption at 1.8V 4.1.4.4 Radio current consumption at 3.0V 4.1.5 2.4 GHz RF Transceiver Characteristics 4.1.5.1 RF Transmitter Characteristics 4.1.5.2 RF Receiver Characteristics 4.1.6 Flash Characteristics 4.1.7 Wake Up, Entry, and Exit times 4.1.8 Oscillators 4.1.8.1 High Frequency Crystal Oscillator 4.1.8.2 Low Frequency Crystal Oscillator 4.1.8.3 High Frequency RC Oscillator (HFRCO) 4.1.8.4 Fast Start_Up RC Oscillator (FSRCO) 4.1.8.5 Low Frequency RC Oscillator 4.1.8.6 Ultra Low Frequency RC Oscillator 4.1.9 GPIO Pins (3V GPIO pins) 4.1.10 Analog to Digital Converter (ADC) 4.1.11 Analog Comparator (ACMP) 4.1.12 Temperature Sense 4.1.13 Brown Out Detectors 4.1.13.1 DVDD BOD 4.1.13.2 LE DVDD BOD 4.1.13.3 AVDD and VIO BODs 4.1.14 SPI Electrical Specifications 4.1.14.1 SPI Master Timing 4.1.14.2 SPI Slave Timing 4.1.15 I2C Electrical Specifications 4.1.15.1 I2C Standard-mode (Sm) 4.1.15.2 I2C Fast-mode (Fm) 4.1.15.3 I2C Fast-mode Plus (Fm+) 4.2 Typical Performance Curves 4.2.1 Supply Current 4.2.2 2.4 GHz Radio 5. Typical Connection Diagrams 5.1 Power 5.2 RF Matching Networks 5.2.1 2.4 GHz 0 dBm Matching Network 5.2.2 2.4 GHz 10 dBm Matching Network 5.2.3 2.4 GHz 20 dBm Matching Network 5.3 Other Connections 6. Pin Definitions 6.1 QFN32 2.4GHz Device Pinout 6.2 Alternate Function Table 6.3 Analog Peripheral Connectivity 6.4 Digital Peripheral Connectivity 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. Revision History
1. Feature List
The EFR32MG21 highlighted features are listed below. •
Low Power Wireless System-on-Chip
•
Wide selection of MCU peripherals
• High Performance 32-bit 80 MHz ARM Cortex®-M33 with • 12-bit 1 Msps SAR Analog to Digital Converter (ADC) DSP instruction and floating-point unit for efficient signal • 2 × Analog Comparator (ACMP) processing • Up to 20 General Purpose I/O pins with output state reten- • Up to 1024 kB flash program memory tion and asynchronous interrupts • Up to 96 kB RAM data memory • 8 Channel DMA Controller • 2.4 GHz radio operation • 12 Channel Peripheral Reflex System (PRS) • TX power up to 20 dBm • 2 × 16-bit Timer/Counter •
Low Energy Consumption
• 3 Compare/Capture/PWM channels • 8.8 mA RX current at 2.4 GHz (1 Mbps GFSK) • 1 × 32-bit Timer/Counter • 9.4 mA RX current at 2.4 GHz (250 kbps O-QPSK DSSS) • 3 Compare/Capture/PWM channels • 9.3 mA TX current @ 0 dBm output power at 2.4 GHz • 32-bit Real Time Counter • 33.8 mA TX current @ 10 dBm output power at 2.4 GHz • 24-bit Low Energy Timer for waveform generation • 50.9 μA/MHz in Active Mode (EM0) • 2 × Watchdog Timer • 5.0 μA EM2 DeepSleep current • 3 × Universal Synchronous/Asynchronous Receiver/Trans- mitter (UART/SPI/SmartCard(ISO 7816)/IrDA/I2S) (96 kB RAM retention and RTC running from LFXO) • • 4.5 μA EM2 DeepSleep current 2 × I2C interface with SMBus support •
Wide Operating Range
(16 kB RAM retention and RTC running from LFRCO) • 1.71 V to 3.8 V single power supply •
High Receiver Performance
• -40°C to 125°C ambient • -104.5 dBm sensitivity @ 250 kbps O-QPSK DSSS •
Standard Security
• -97.5 dBm sensitivity @ 1 Mbit/s GFSK • Hardware Cryptographic Acceleration for AES128/256, • -94.4 dBm sensitivity @ 2 Mbit/s GFSK SHA-1, SHA-2 (up to 256-bit), ECC (up to 256-bit), ECDSA • -104.9 dBm sensitivity @ 125 kbps GFSK (up to 256-bit), ECDH, and J-Pake. •
Supported Modulation Formats
• True Random Number Generator (TRNG) • GFSK • ARM TrustZone • OQPSK • Secure Boot •
Protocol Support
• Secure Debug Unlock • Bluetooth Low Energy (Bluetooth 5) •
QFN32 4x4 mm Package
• Zigbee • 0.4 mm pitch • Thread
silabs.com
| Building a more connected world. Rev. 1.0 | 2 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Radio 3.2.1 Antenna Interface 3.2.2 Fractional-N Frequency Synthesizer 3.2.3 Receiver Architecture 3.2.4 Transmitter Architecture 3.2.5 Packet and State Trace 3.2.6 Data Buffering 3.2.7 Radio Controller (RAC) 3.3 General Purpose Input/Output (GPIO) 3.4 Clocking 3.4.1 Clock Management Unit (CMU) 3.4.2 Internal and External Oscillators 3.5 Counters/Timers and PWM 3.5.1 Timer/Counter (TIMER) 3.5.2 Low Energy Timer (LETIMER) 3.5.3 Real Time Clock with Capture (RTCC) 3.5.4 Back-Up Real Time Counter 3.5.5 Watchdog Timer (WDOG) 3.6 Communications and Other Digital Peripherals 3.6.1 Universal Synchronous/Asynchronous Receiver/Transmitter (USART) 3.6.2 Inter-Integrated Circuit Interface (I2C) 3.6.3 Peripheral Reflex System (PRS) 3.7 Security Features 3.7.1 Standard Security 3.7.2 True Random Number Generator 3.8 Analog 3.8.1 Analog Comparator (ACMP) 3.8.2 Analog to Digital Converter (ADC) 3.9 Reset Management Unit (RMU) 3.10 Core and Memory 3.10.1 Processor Core 3.10.2 Memory System Controller (MSC) 3.10.3 Linked Direct Memory Access Controller (LDMA) 3.11 Memory Map 3.12 Configuration Summary 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Absolute Maximum Ratings 4.1.2 General Operating Conditions 4.1.3 Thermal Characteristics 4.1.4 Current Consumption 4.1.4.1 MCU current consumption at 1.8V 4.1.4.2 MCU current consumption at 3.0V 4.1.4.3 Radio current consumption at 1.8V 4.1.4.4 Radio current consumption at 3.0V 4.1.5 2.4 GHz RF Transceiver Characteristics 4.1.5.1 RF Transmitter Characteristics 4.1.5.2 RF Receiver Characteristics 4.1.6 Flash Characteristics 4.1.7 Wake Up, Entry, and Exit times 4.1.8 Oscillators 4.1.8.1 High Frequency Crystal Oscillator 4.1.8.2 Low Frequency Crystal Oscillator 4.1.8.3 High Frequency RC Oscillator (HFRCO) 4.1.8.4 Fast Start_Up RC Oscillator (FSRCO) 4.1.8.5 Low Frequency RC Oscillator 4.1.8.6 Ultra Low Frequency RC Oscillator 4.1.9 GPIO Pins (3V GPIO pins) 4.1.10 Analog to Digital Converter (ADC) 4.1.11 Analog Comparator (ACMP) 4.1.12 Temperature Sense 4.1.13 Brown Out Detectors 4.1.13.1 DVDD BOD 4.1.13.2 LE DVDD BOD 4.1.13.3 AVDD and VIO BODs 4.1.14 SPI Electrical Specifications 4.1.14.1 SPI Master Timing 4.1.14.2 SPI Slave Timing 4.1.15 I2C Electrical Specifications 4.1.15.1 I2C Standard-mode (Sm) 4.1.15.2 I2C Fast-mode (Fm) 4.1.15.3 I2C Fast-mode Plus (Fm+) 4.2 Typical Performance Curves 4.2.1 Supply Current 4.2.2 2.4 GHz Radio 5. Typical Connection Diagrams 5.1 Power 5.2 RF Matching Networks 5.2.1 2.4 GHz 0 dBm Matching Network 5.2.2 2.4 GHz 10 dBm Matching Network 5.2.3 2.4 GHz 20 dBm Matching Network 5.3 Other Connections 6. Pin Definitions 6.1 QFN32 2.4GHz Device Pinout 6.2 Alternate Function Table 6.3 Analog Peripheral Connectivity 6.4 Digital Peripheral Connectivity 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. Revision History
