Datasheet A80603, A80603-1 (Allegro) - 9
| Manufacturer | Allegro |
| Description | LED Driver with Pre-Emptive Boost for Ultra-High Dimming Ratio and Low Output Ripple |
| Pages / Page | 30 / 9 — A80603 and. LED Driver with Pre-Emptive Boost. A80603-1 for Ultra-High … |
| File Format / Size | PDF / 4.6 Mb |
| Document Language | English |
A80603 and. LED Driver with Pre-Emptive Boost. A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple
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A80603 and LED Driver with Pre-Emptive Boost A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple FUNCTIONAL DESCRIPTION
The A80603 is a multistring LED regulator with an integrated Only if no faults were detected, then the IC can proceed to start boost switch and four precision current sinks. It incorporates a switching. patented Pre-Emptive Boost (PEB) control algorithm to achieve PWM dimming ratio over 15,000:1 at 200 Hz. PEB control As long as EN = H, the PWM pin can be toggled to control the also minimizes output ripple to avoid audible noise from output brightness of LED channels by using PWM dimming. Alterna- ceramic capacitors. tively, EN and PWM can be tied together to allow single-wire control for both power on/off and PWM dimming. If EN is pulled The switching frequency can be either synchronized to an low for longer than 16 ms, the IC shuts off. external clock or generated internally. Spread-spectrum tech- nique (with user-programmable dithering range and modulation frequency) is provided to reduce EMI. A clock-out signal (CLK- OUT) allows other converters to be synchronized to the switching frequency of A80603.
Enabling the IC
The A80603 wakes up when EN pin is pulled above logic high level, provided that VIN pin voltage is over the VIN_UVLO threshold. The boost stage and LED channels are enabled sepa- rately by PWM = H signal after the IC powers up. The IC performs a series of safety checks at power up, to deter- mine if there are possible fault conditions that might prevent the system from functioning correctly. Power-up checks include: • VOUT shorted to GND • LED pin shorted to GND
Figure 4: Startup showing EN, VDD, CLKOUT, and ISET (PWM = L). Note that CLKOUT is available as soon as VDD ramps up, even though
• FSET pin open/shorted
Boost stage and LED drivers are not yet enabled.
• ISET pin open/shorted to GND, etc. Allegro MicroSystems, LLC 9 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming with APWM Pin Extending LED Dimming Ratio Analog Dimming with External Voltage VDD Shutdown Fault Detection and Protection LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Current Sense Resistor Input UVLO Fault Protection During Operation Fault Recovery Mechanism Package Outline Drawing
The A80603 is a multistring LED regulator with an integrated Only if no faults were detected, then the IC can proceed to start boost switch and four precision current sinks. It incorporates a switching. patented Pre-Emptive Boost (PEB) control algorithm to achieve PWM dimming ratio over 15,000:1 at 200 Hz. PEB control As long as EN = H, the PWM pin can be toggled to control the also minimizes output ripple to avoid audible noise from output brightness of LED channels by using PWM dimming. Alterna- ceramic capacitors. tively, EN and PWM can be tied together to allow single-wire control for both power on/off and PWM dimming. If EN is pulled The switching frequency can be either synchronized to an low for longer than 16 ms, the IC shuts off. external clock or generated internally. Spread-spectrum tech- nique (with user-programmable dithering range and modulation frequency) is provided to reduce EMI. A clock-out signal (CLK- OUT) allows other converters to be synchronized to the switching frequency of A80603.
Enabling the IC
The A80603 wakes up when EN pin is pulled above logic high level, provided that VIN pin voltage is over the VIN_UVLO threshold. The boost stage and LED channels are enabled sepa- rately by PWM = H signal after the IC powers up. The IC performs a series of safety checks at power up, to deter- mine if there are possible fault conditions that might prevent the system from functioning correctly. Power-up checks include: • VOUT shorted to GND • LED pin shorted to GND
Figure 4: Startup showing EN, VDD, CLKOUT, and ISET (PWM = L). Note that CLKOUT is available as soon as VDD ramps up, even though
• FSET pin open/shorted
Boost stage and LED drivers are not yet enabled.
• ISET pin open/shorted to GND, etc. Allegro MicroSystems, LLC 9 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming with APWM Pin Extending LED Dimming Ratio Analog Dimming with External Voltage VDD Shutdown Fault Detection and Protection LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Current Sense Resistor Input UVLO Fault Protection During Operation Fault Recovery Mechanism Package Outline Drawing
