Datasheet A7987 (STMicroelectronics) - 8

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A7987 Functional description 5 Functional description
The A7987 device is based on a voltage mode, constant frequency control loop. The output voltage VOUT, sensed by the feedback pin (FB), is compared to an internal reference (0.8 V) providing an error signal on the COMP pin. The COMP voltage level is then compared to a fixed frequency saw-tooth ramp, which finally controls the on- and off-time of the power switch. The main internal blocks are shown in the block diagram in Figure 2. Block diagram and can be summarized as follow: • The fully integrated oscillator that provides the sawtooth ramp to modulate the duty cycle and the synchronization signal. Its switching frequency can be adjusted by an external resistor. The input voltage feed-forward is implemented. • The soft-start circuitry to limit inrush current during the start-up phase. • The voltage mode error amplifier. • The pulse width modulator and the relative logic circuitry necessary to drive the internal power switch. • The high-side driver for embedded N-channel power MOSFET switch and bootstrap circuitry. A dedicated high-resistance low-side MOSFET, for anti-boot discharge management purposes, is also present. • The peak current limit sensing block, with programmable threshold, to handle overload and short-circuit conditions including current fold-back and a thermal shutdown block, to prevent thermal runaway. • The voltage regulator and internal reference, to supply the internal circuitry and provide a fixed internal reference. The switchover function from VCC to VBIAS can be implemented for higher efficiency. This block also implements a voltage monitor circuitry (UVLO) that checks the input and internal voltages. • The output voltage monitor circuitry which releases the PGOOD signal if the sensed output voltage is above 87% of the target value.
5.1 Oscillator and synchronization
Figure 4. Oscillator and synchronization shows the block diagram of the oscillator circuit. The internal oscillator provides a constant frequency clock, whose frequency depends on the resistor externally connected between the FSW pin and ground.
Figure 4. Oscillator and synchronization
clock 180° phase shift FSW Clock Generator Synchronization SYNCH Ramp Sawtooth Generator If the FSW pin is left floating, the programmed frequency is 250 kHz (typ.); if FSW pin is connected to an external resistor the programmed switching frequency can be increased up to 1.5 MHz, as shown in Figure 5. Switching frequency programmability. The required RFSW value (expressed in kΩ) is estimated by the following equation: FSW = 250kHz + 12500 R (1) FSW
DS12928
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Rev 1 page 8/37
Document Outline Cover image Product status link / summary Features Applications Description 1 Application schematic 2 Block diagram 3 Pin settings 3.1 Pin connection 3.2 Pin description 3.3 Maximum ratings 3.4 Thermal data 3.5 ESD protection 4 Electrical characteristics 5 Functional description 5.1 Oscillator and synchronization 5.2 Soft-start 5.3 Error amplifier and light-load management 5.4 Low VIN operation 5.5 Overcurrent protection 5.6 Overtemperature protection 6 Application information 6.1 Input capacitor selection 6.2 Output capacitor selection 6.3 Inductor selection 6.4 Compensation network 6.4.1 Type II compensation network 6.4.2 Type III compensation network 6.5 Thermal considerations 6.6 Layout considerations 7 Demonstration board 8 Application ideas 8.1 Positive buck-boost 8.2 Negative buck-boost 9 Package information 9.1 HTSSOP16 package information 10 Ordering information Revision history