Datasheet AD7124-4-EP (Analog Devices)

4-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference Enhanced Product AD7124-4-EP FEATURES Multiple filter options 3 power modes Sensor burnout detection RMS noise Automatic channel sequencer Low power: 24 nV rms at 1.17 SPS, gain = 128 (255 μA typical) Per channel configuration Mid power: 20 nV rms at 2.34 SPS, gain = 128 (355 μA typical) Power-down current: 5 μA maximum Full power: 23 nV rms at 9.4 SPS, gain = 128 (930 μA typical) 24-lead TSSOP Up to 22 noise free bits in all power modes (gain = 1) 3-wire or 4-wire serial interface Output data rate SPI, QSPI, MICROWIRE, and DSP compatible Full power: 9.38 SPS to 19,200 SPS Schmitt trigger on SCLK Mid power: 2.34 SPS to 4800 SPS ENHANCED PRODUCT FEATURES Low power: 1.17 SPS to 2400 SPS Supports defense and aerospace applications (AQEC standard) Rail-to-rail analog inputs for gains > 1 Full military temperature range: −55°C to +125°C Simultaneous 50 Hz/60 Hz rejection at 25 SPS (single cycle Controlled manufacturing baseline settling) 1 assembly/test site Diagnostic functions (which aid safe integrity level (SIL) 1 fabrication site certification) Product change notification Crosspoint multiplexed analog inputs Qualification data available on request 4 differential/7 pseudo differential inputs Programmable gain (1 to 128) APPLICATIONS Band gap reference with 10 ppm/°C drift maximum (70 μA) Military and space Matched programmable excitation currents Avionics Internal clock oscillator and temperature sensor Pressure measurement On-chip bias voltage generator Instrumentation Low-side power switch FUNCTIONAL BLOCK DIAGRAM AV REGCAPA IOV DD REFOUT REFIN1(+) REFIN1(–) DD REGCAPD V BANDGAP BIAS REFIN2(+) 1.9V REF AVDD AVSS 1.8V LDO AV REFIN2(–) CROSSPOINT SS LDO MUX AVDD AIN0/IOUT/VBIAS REFERENCE BUFFERS AIN1/IOUT/VBIAS DOUT/RDY AIN2/IOUT/VBIAS/P1 BUF SERIAL 24-BIT VARIABLE AIN3/IOUT/VBIAS/P2 BURNOUT INTERFACE PGA1 PGA2 DIN Σ-∆ ADC DIGITAL DETECT AND FILTER AIN4/IOUT/VBIAS BUF CONTROL SCLK LOGIC AIN5/IOUT/VBIAS X-MUX CS AIN6/IOUT/VBIAS/REFIN2(+) AV ANALOG SS CHANNEL AIN7/IOUT/VBIAS/REFIN2(–) BUFFERS SEQUENCER GPOs SYNC TEMPERATURE AVDD DIAGNOSTICS SENSOR COMMUNICATIONS DIAGNOSTICS POWER SUPPLY EXCITATION INTERNAL PSW SIGNAL CHAIN CURRENTS CLOCK CLK POWER DIGITAL SWITCH AD7124-4-EP AVSS
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AVSS DGND
20190- Figure 1.
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Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE