Datasheet AD7476-EP (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 1MSPS, 12-Bit ADC in 6 Lead SOT-23 |
| Pages / Page | 12 / 3 — AD7476-EP. SPECIFICATIONS. Table 1. Parameter. S Version. Unit. Test … |
| File Format / Size | PDF / 182 Kb |
| Document Language | English |
AD7476-EP. SPECIFICATIONS. Table 1. Parameter. S Version. Unit. Test Conditions/Comments
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AD7476-EP SPECIFICATIONS
VDD = 2.35 V to 5.25 V, fSCLK = 12 MHz, fSAMPLE = 600 kSPS, unless otherwise noted; TA = TMIN to TMAX, unless otherwise noted.
Table 1. Parameter S Version Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-(Noise + Distortion) (SINAD) 69 dB min 70 dB min TA = 25°C Signal-to-Noise Ratio (SNR) 70 dB min Total Harmonic Distortion (THD) −78 dB typ Peak Harmonic or Spurious Noise (SFDR) −80 dB typ Intermodulation Distortion (IMD) Second-Order Terms −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Third-Order Terms −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Aperture Delay 10 ns typ Aperture Jitter 30 ps typ Full Power Bandwidth 6.5 MHz typ At 3 dB DC ACCURACY VDD = (2.35 V to 3.6 V)1 Resolution 12 Bits Integral Nonlinearity ±1.5 LSB max ±0.6 LSB typ Differential Nonlinearity −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits ±0.75 LSB typ Offset Error ±2 LSB max LSB typ Gain Error ±2 LSB max LSB typ ANALOG INPUT Input Voltage Ranges 0 to VDD V DC Leakage Current ±1 μA max Input Capacitance 30 pF typ LOGIC INPUT Input High Voltage, VINH 2.4 V min 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.4 V max VDD = 3 V 0.8 V max VDD = 5 V Input Current, IIN, SCLK Pin ±1 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±1 μA typ Input Capacitance, C 2 IN 10 pF max LOGIC OUTPUT Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA; VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±10 μA max Floating-State Output Capacitance2 10 pF max Output Coding Straight (natural) binary CONVERSION RATE Conversion Time 1.33 μs max 16 SCLK cycles Track-and-Hold Acquisition Time 500 ns max Full-scale step input 400 ns max Sine wave input ≤ 100 kHz Throughput Rate 600 kSPS max Rev. 0 | Page 3 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
AD7476-EP SPECIFICATIONS
VDD = 2.35 V to 5.25 V, fSCLK = 12 MHz, fSAMPLE = 600 kSPS, unless otherwise noted; TA = TMIN to TMAX, unless otherwise noted.
Table 1. Parameter S Version Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-(Noise + Distortion) (SINAD) 69 dB min 70 dB min TA = 25°C Signal-to-Noise Ratio (SNR) 70 dB min Total Harmonic Distortion (THD) −78 dB typ Peak Harmonic or Spurious Noise (SFDR) −80 dB typ Intermodulation Distortion (IMD) Second-Order Terms −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Third-Order Terms −78 dB typ fa = 103.5 kHz, fb = 113.5 kHz Aperture Delay 10 ns typ Aperture Jitter 30 ps typ Full Power Bandwidth 6.5 MHz typ At 3 dB DC ACCURACY VDD = (2.35 V to 3.6 V)1 Resolution 12 Bits Integral Nonlinearity ±1.5 LSB max ±0.6 LSB typ Differential Nonlinearity −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits ±0.75 LSB typ Offset Error ±2 LSB max LSB typ Gain Error ±2 LSB max LSB typ ANALOG INPUT Input Voltage Ranges 0 to VDD V DC Leakage Current ±1 μA max Input Capacitance 30 pF typ LOGIC INPUT Input High Voltage, VINH 2.4 V min 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.4 V max VDD = 3 V 0.8 V max VDD = 5 V Input Current, IIN, SCLK Pin ±1 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±1 μA typ Input Capacitance, C 2 IN 10 pF max LOGIC OUTPUT Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA; VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±10 μA max Floating-State Output Capacitance2 10 pF max Output Coding Straight (natural) binary CONVERSION RATE Conversion Time 1.33 μs max 16 SCLK cycles Track-and-Hold Acquisition Time 500 ns max Full-scale step input 400 ns max Sine wave input ≤ 100 kHz Throughput Rate 600 kSPS max Rev. 0 | Page 3 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
