Datasheet ADA8282 (Analog Devices) - 2
| Manufacturer | Analog Devices |
| Description | Radar Receive Path AFE: 4-Channel LNA and PGA |
| Pages / Page | 21 / 2 — ADA8282. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 7/15—Revision 0: … |
| File Format / Size | PDF / 517 Kb |
| Document Language | English |
ADA8282. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 7/15—Revision 0: Initial Version
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ADA8282 Data Sheet TABLE OF CONTENTS
Features... 1 Output Swing Variation with Gain... 12 Applications ... 1 Offset Voltage Adjustments .. 12 Functional Block Diagram .. 1 Single-Ended or Differential Input... 12 General Description .. 1 Short-Circuit Currents .. 12 Revision History .. 2 SPI Interface ... 12 Specifications ... 3 Channel to Channel Phase Matching... 13 Digital Specifications ... 4 Applications ... 14 Absolute Maximum Ratings ... 5 Increased Gain Using Two ADA8282 Devices in Series ... 14 Thermal Resistance ... 5 Multiplexing Inputs Using Multiple ADA8282 Devices ... 15 ESD Caution... 5 Basic Connections for a Typical Application... 16 Pin Configuration and Function Descriptions.. 6 Register Map .. 17 Typical Performance Characteristics.. 7 Register Summary ... 17 Theory of Operation.. 11 Register Details .. 17 Radar Receive Path AFE.. 11 Outline Dimensions .. 21 Default SPI Settings ... 11 Ordering Guide.. 21 Input Impedance.. 11 Automotive Products... 21 Power Modes.. 11 Programmable Gain Range ... 12
REVISION HISTORY 7/15—Revision 0: Initial Version
Rev. 0 | Page 2 of 21 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS DIGITAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION RADAR RECEIVE PATH AFE DEFAULT SPI SETTINGS INPUT IMPEDANCE POWER MODES PROGRAMMABLE GAIN RANGE OUTPUT SWING VARIATION WITH GAIN OFFSET VOLTAGE ADJUSTMENTS VIO Pin SINGLE-ENDED OR DIFFERENTIAL INPUT SHORT-CIRCUIT CURRENTS SPI INTERFACE CHANNEL TO CHANNEL PHASE MATCHING APPLICATIONS INFORMATION INCREASED GAIN USING TWO ADA8282 DEVICES IN SERIES MULTIPLEXING INPUTS USING MULTIPLE ADA8282 DEVICES BASIC CONNECTIONS FOR A TYPICAL APPLICATION REGISTER MAP REGISTER SUMMARY REGISTER DETAILS Register 0x00: Interface Configuration Register Register 0x01: Soft Reset Register Register 0x04: Chip ID Low Register Register 0x05: Chip ID High Register Register 0x06: Revision Register Register 0x10: LNA Offset 0 Register Register 0x11: LNA Offset 1 Register Register 0x12: LNA Offset 2 Register Register 0x13: LNA Offset 3 Register Register 0x14: PGA Bias Register Register 0x15: PGA Gain Register Register 0x17: Enable Channel Register Register 0x18: Enable Bias Generator Register Register 0x1D: GPIO Write Register Register 0x1E: GPIO Read Register OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
ADA8282 Data Sheet TABLE OF CONTENTS
Features... 1 Output Swing Variation with Gain... 12 Applications ... 1 Offset Voltage Adjustments .. 12 Functional Block Diagram .. 1 Single-Ended or Differential Input... 12 General Description .. 1 Short-Circuit Currents .. 12 Revision History .. 2 SPI Interface ... 12 Specifications ... 3 Channel to Channel Phase Matching... 13 Digital Specifications ... 4 Applications ... 14 Absolute Maximum Ratings ... 5 Increased Gain Using Two ADA8282 Devices in Series ... 14 Thermal Resistance ... 5 Multiplexing Inputs Using Multiple ADA8282 Devices ... 15 ESD Caution... 5 Basic Connections for a Typical Application... 16 Pin Configuration and Function Descriptions.. 6 Register Map .. 17 Typical Performance Characteristics.. 7 Register Summary ... 17 Theory of Operation.. 11 Register Details .. 17 Radar Receive Path AFE.. 11 Outline Dimensions .. 21 Default SPI Settings ... 11 Ordering Guide.. 21 Input Impedance.. 11 Automotive Products... 21 Power Modes.. 11 Programmable Gain Range ... 12
REVISION HISTORY 7/15—Revision 0: Initial Version
Rev. 0 | Page 2 of 21 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS DIGITAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION RADAR RECEIVE PATH AFE DEFAULT SPI SETTINGS INPUT IMPEDANCE POWER MODES PROGRAMMABLE GAIN RANGE OUTPUT SWING VARIATION WITH GAIN OFFSET VOLTAGE ADJUSTMENTS VIO Pin SINGLE-ENDED OR DIFFERENTIAL INPUT SHORT-CIRCUIT CURRENTS SPI INTERFACE CHANNEL TO CHANNEL PHASE MATCHING APPLICATIONS INFORMATION INCREASED GAIN USING TWO ADA8282 DEVICES IN SERIES MULTIPLEXING INPUTS USING MULTIPLE ADA8282 DEVICES BASIC CONNECTIONS FOR A TYPICAL APPLICATION REGISTER MAP REGISTER SUMMARY REGISTER DETAILS Register 0x00: Interface Configuration Register Register 0x01: Soft Reset Register Register 0x04: Chip ID Low Register Register 0x05: Chip ID High Register Register 0x06: Revision Register Register 0x10: LNA Offset 0 Register Register 0x11: LNA Offset 1 Register Register 0x12: LNA Offset 2 Register Register 0x13: LNA Offset 3 Register Register 0x14: PGA Bias Register Register 0x15: PGA Gain Register Register 0x17: Enable Channel Register Register 0x18: Enable Bias Generator Register Register 0x1D: GPIO Write Register Register 0x1E: GPIO Read Register OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
