InnoSwitch3-CE Resistors R6 and R7 provide line voltage sensing and provide a current Zener diode with a clamping voltage approximately 6 V lower than the to U1, which is proportional to the DC voltage across capacitor C3. At bias winding rectified voltage at which OVP is expected to be approximately 95 V DC, the current through these resistors exceeds triggered be selected. A forward voltage drop of 1 V can be assumed the line undervoltage threshold, which results in enabling of U1. At for the blocking diode. A small signal standard recovery diode is approximately 435 VDC, the current through these resistors exceeds recommended. The blocking diode prevents any reverse current the line overvoltage threshold, which results in disabling of U1. discharging the bias capacitor during start-up. Final y, the value of the series resistor required can be calculated such that a current Key Application Considerations higher than I will flow into the PRIMARY BYPASS pin during an SD output overvoltage. Output Power TableReducing No-load Consumption The data sheet output power table (Table 1) represents the maximum The InnoSwitch3-CE IC can start in self-powered mode, drawing practical continuous output power level that can be obtained under energy from the BYPASS pin capacitor charged through an internal the fol owing conditions: current source. Use of a bias winding is however required to provide 1. The minimum DC input voltage is 90 V or higher for 85 VAC input, supply current to the PRIMARY BYPASS pin once the InnoSwitch3-CE 220 V or higher for 230 VAC input or 115 VAC with a voltage- IC has started switching. An auxiliary (bias) winding provided on the doubler. Input capacitor voltage should be sized to meet these transformer serves this purpose. A bias winding driver supply to the criteria for AC input designs. PRIMARY BYPASS pin enables design of power supplies with no-load 2. Efficiency assumptions depend on power level. Smallest device power consumption less than 15 mW. Resistor R10 shown in Figure power level assumes efficiency >84% increasing to >89% for the 10 should be adjusted to achieve the lowest no-load input power. largest device. Secondary-Side Overvoltage Protection (Auto-Restart Mode) 3. Transformer primary inductance tolerance of ±10%. The secondary-side output overvoltage protection provided by the 4. Reflected output voltage (VOR) is set to maintain K = 0.8 at P InnoSwitch3-CE IC uses an internal auto restart circuit that is minimum input voltage for universal line and K = 1 for high input P triggered by an input current exceeding a threshold of I into the line designs. BPS(SD) SECONDARY BYPASS pin. The direct output sensed OVP function can 5. Maximum conduction losses for adapters is limited to 0.6 W, 0.8 W be realized by connecting a Zener diode from the output to the for open frame designs. SECONDARY BYPASS pin. The Zener diode voltage needs to be the 6. Increased current limit is selected for peak and open frame power difference between 1.25 × V and 4.4 V − the SECONDARY BYPASS columns and standard current limit for adapter columns. OUT pin voltage. It is necessary to add a low value resistor in series with 7. The part is board mounted with SOURCE pins soldered to a the OVP Zener diode to limit the maximum current into the sufficient area of copper and/or a heat sink to keep the SOURCE SECONDARY BYPASS pin. pin temperature at or below 110 °C. 8. Ambient temperature of 50 °C for open frame designs and 40 °C Selection of Components for sealed adapters. 9. Below a value of 1, K is the ratio of ripple to peak primary Components for InnoSwitch3-CE P current. To prevent reduced power delivery, due to premature Primary-Side Circuit termination of switching cycles, a transient K limit of ≥0.25 is P recommended. This prevents the initial current limit (I ) from BPP Capacitor INT being exceeded at MOSFET turn-on. A capacitor connected from the PRIMARY BYPASS pin of the Primary-Side Overvoltage Protection (Latch-Off Mode) InnoSwitch3-CE IC to GND provides decoupling for the primary-side Primary-side output overvoltage protection provided by the control er and also selects current limit. A 0.47 mF or 4.7 mF capacitor InnoSwitch3-CE IC uses an internal latch that is triggered by a may be used. Though electrolytic capacitors can be used, often threshold current of I into the PRIMARY BYPASS pin. In addition to surface mount multi-layer ceramic capacitors are preferred for use on SD an internal filter, the PRIMARY BYPASS pin capacitor forms an double sided boards as they enable placement of capacitors close to external filter helping noise immunity. For the bypass capacitor to be the IC. Their smal size also makes it ideal for compact power supplies. effective as a high frequency filter, the capacitor should be located as 16 V or 25 V rated X5R or X7R dielectric capacitors are recommended close as possible to the SOURCE and PRIMARY BYPASS pins of the to ensure that minimum capacitance requirements are met. device. Bias Winding and External Bias Circuit The primary sensed OVP function can be realized by connecting a The internal regulator connected from the DRAIN pin of the MOSFET series combination of a Zener diode, a resistor and a blocking diode to the PRIMARY BYPASS pin of the InnoSwitch3-CE primary-side from the rectified and filtered bias winding voltage supply to the control er charges the capacitor connected to the PRIMARY BYPASS PRIMARY BYPASS pin. The rectified and filtered bias winding output pin to achieve start-up. A bias winding should be provided on the voltage may be higher than expected (up to 1.5X or 2X the desired transformer with a suitable rectifier and filter capacitor to create a value) due to poor coupling of the bias winding with the output bias supply that can be used to supply at least 1 mA of current to the winding and the resulting ringing on the bias winding voltage PRIMARY BYPASS pin. waveform. It is therefore recommended that the rectified bias The turns ratio for the bias winding should be selected such that 7 V winding voltage be measured. This measurement should be ideal y is developed across the bias winding at the lowest rated output done at the lowest input voltage and with highest load on the output. voltage of the power supply at the lowest load condition. If the This measured voltage should be used to select the components voltage is lower than this, no-load input power will increase. required to achieve primary sensed OVP. It is recommended that a 10 Rev. D 08/18 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-CE Functional Description Primary Controller Secondary Controller Applications Example Key Application Considerations Selection of Components Recommendations for Circuit Board Layout Layout Example Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Curves InSOP-24D Package Drawing InSOP-24D Package Marking Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information