Datasheet ADP5072 (Analog Devices) - 9 Manufacturer Analog Devices Description 1 A/0.6 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs Pages / Page 24 / 9 — Data Sheet. ADP5072. 100. NCY. ICI. TA = +125°C. A = +25°C. TA = +25°C. … File Format / Size PDF / 655 Kb Document Language English
Data Sheet. ADP5072. 100. NCY. ICI. TA = +125°C. A = +25°C. TA = +25°C. TA = –40°C. 0.001. 0.01. 0.1. 1.0. LOAD CURRENT (A). 0.5. 0.4. 0.3. 0.2. INAL. N F
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Model Line for this Datasheet Text Version of Document Data Sheet ADP5072 100 100 90 90 80 80 70 70 %) %) ( 60 ( 60 NCY NCY E 50 E 50 ICI ICI F F F 40 F 40 E E 30 30 20 20 TA = +125°C TA = +125°C 10 T 10 A = +25°C TA = +25°C TA = –40°C TA = –40°C 0 10 10.001 0.01 0.1 1.0 00.001 0.01 0.1 1.0 014LOAD CURRENT (A) 16646-LOAD CURRENT (A) 16646- Figure 15. Efficiency vs. Load Current for Boost Regulator over Temperature, Figure 18. Efficiency vs. Load Current for Inverting Regulator over VIN = 5 V, VPOS = 15 V, fSW = 1.2 MHz Temperature, VIN = 5 V, VNEG = −15 V, fSW = 1.2 MHz0.5 0.5 0.4 0.4 %) 0.3 %) 0.3 ( ( 0.2 0.2 INAL INAL M M 0.1 0.1 NO NO M M 0 0 RO RO N F –0.1 N F –0.1 IO IO AT –0.2 AT –0.2 ARI ARI V –0.3 V –0.3 VNEG ACCURACY –0.4 V –0.4 V POS ACCURACY REF ACCURACY V V FB1 ACCURACY FB2 ACCURACY –0.5 –0.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0152.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 018VIN (V) V 16646-IN (V) 16646- Figure 16. Boost Regulator Line Regulation, VPOS = 15 V, Figure 19. Inverting Regulator Line Regulation, VNEG = −15 V, fSW = 1.2 MHz, 15 mA Load, TA = 25°C fSW = 1.2 MHz, 15 mA Load, TA = 25°C0.5 ) 0.5 ) % % ( ( 0.4 0.4 GE GE 0.3 0.3 OLTA OLTA 1.2MHz 0.2 T V 0.2 T V 2.4MHz U U TP 0.1 TP 0.1 L OU 0 L OU 0 A A IN IN –0.1 –0.1 OM OM N N –0.2 –0.2 IN IN –0.3 –0.3 TION TION IA 1.2MHz IA R –0.4 –0.4 R A 2.4MHz A V V –0.5 –0.5 0 0.05 0.10 0.15 0.20 0.25 0160 0.02 0.04 0.06 0.08 0.10 0.12 220LOAD CURRENT (A) 16646-LOAD CURRENT (A) 16646- Figure 17. Boost Regulator Load Regulation, VIN = 5 V, VPOS = 15 V Figure 20. Inverting Regulator Load Regulation, VIN = 5 V, VNEG = −15 V Rev. 0 | Page 9 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PWM MODE PSM MODE UNDERVOLTAGE LOCKOUT (UVLO) OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATOR PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION THERMAL SHUTDOWN START-UP SEQUENCE APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITORS Input Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator LOOP COMPENSATION Boost Regulator Inverting Regulator COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE