Datasheet TMC2590 (TRINAMIC) - 8
| Manufacturer | TRINAMIC |
| Description | Power Driver for Stepper Motors |
| Pages / Page | 64 / 8 — 3 Internal Architecture. Figure 3.1 TMC2590 block diagram and application … |
| File Format / Size | PDF / 2.0 Mb |
| Document Language | English |
3 Internal Architecture. Figure 3.1 TMC2590 block diagram and application schematic
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Text Version of Document
TMC2590 DATASHEET (V1.0 / 2019-FEB-22) 8
3 Internal Architecture
Figure 3.1 shows the internal architecture of the TMC2590. +VM 9-59V 220n 100n 16V VHS VS TMC2590 +VCC VM-10V 5V supply VCC_IO OSC 5V linear 5VOUT D 3.3V or 5V linear 15MHz regulator Provide sufficient filtering capacity near regulator bridge transistors (electrolyt capacitors 100n 470nF and ceramic capacitors) +V slope HS VHS M 8-20MHz CLK D Clock selector CLK HA1 P-Gate ENABLE S HA2 S G drivers STEP P G P D Step & D D step & dir Direction DIR BMA1 (optional) D interface Break Phase polarity Chopper Short BMA2 before Step multiply logic motor coil A detectors 0 0. make 16 to 256 V . S 3 1 E 0 6 NS V V D D Sine wave SIN & E LA2 N N G G COS N-Gate 1024 entry S S LA1 drivers Open or GND for SRA SPI, VCC_IO for ST_ALONE D VREF 47R stand-alone slope LS +5V ENN 100mOhm for 2.8A peak Digital control RSENSE D (resp. 1.5A RMS) 9 DAC SRAL CSN M optional input protection resistors D U against inductive sparks upon SCK SPI / X motor cable break D DAC Stand-alone SRBL SDI SPI interface 9 100mOhm for 2.8A peak D RSENSE configuration slope LS (resp. 1.5A RMS) +5V SDO 47R D SRB CoolStep N-Gate LB1 S S Energy G drivers N G N efficiency LB2 D D stallGuard SG_TST BACK D stallGuard 2 Break output EMF Phase polarity Chopper Short motor coil B before logic detectors BMB2 make Protection & SHORT TO BMB1 Diagnostics GND D D P P G P-Gate HB2 G S S ENABLE drivers Temp. sensor HB1 100°C, 120°C, 136°C, 150°C slope HS VHS +VM DIE PAD GND TST_MODE
Figure 3.1 TMC2590 block diagram and application schematic
Prominent features include: Oscillator and clock selector provides the system clock from the on-chip oscillator or an external source. Step and direction interface uses a microstep counter and sine table to generate target currents for the coils. SPI interface receives commands for configuration or commands that directly set the coil current values. Multiplexer selects either the output of the sine table or the SPI interface for controlling the current into the motor coils. Multipliers scales down the currents to both coils when the currents are greater than those required by the load on the motor or as set by the CS current scale parameter. DACs and comparators converts the digital current values to analog signals that are compared with the voltages on the sense resistors. Comparator outputs terminate chopper drive phases when target currents are reached. Break-before-make and gate drivers ensure non-overlapping pulses, boost drive voltage, and control pulse slope to the gates of the power MOSFETs. On-chip voltage regulators provide high-side voltage for P-channel MOSFET gate drivers and supply voltage for on-chip analog and digital circuits. www.trinamic.com
3 Internal Architecture
Figure 3.1 shows the internal architecture of the TMC2590. +VM 9-59V 220n 100n 16V VHS VS TMC2590 +VCC VM-10V 5V supply VCC_IO OSC 5V linear 5VOUT D 3.3V or 5V linear 15MHz regulator Provide sufficient filtering capacity near regulator bridge transistors (electrolyt capacitors 100n 470nF and ceramic capacitors) +V slope HS VHS M 8-20MHz CLK D Clock selector CLK HA1 P-Gate ENABLE S HA2 S G drivers STEP P G P D Step & D D step & dir Direction DIR BMA1 (optional) D interface Break Phase polarity Chopper Short BMA2 before Step multiply logic motor coil A detectors 0 0. make 16 to 256 V . S 3 1 E 0 6 NS V V D D Sine wave SIN & E LA2 N N G G COS N-Gate 1024 entry S S LA1 drivers Open or GND for SRA SPI, VCC_IO for ST_ALONE D VREF 47R stand-alone slope LS +5V ENN 100mOhm for 2.8A peak Digital control RSENSE D (resp. 1.5A RMS) 9 DAC SRAL CSN M optional input protection resistors D U against inductive sparks upon SCK SPI / X motor cable break D DAC Stand-alone SRBL SDI SPI interface 9 100mOhm for 2.8A peak D RSENSE configuration slope LS (resp. 1.5A RMS) +5V SDO 47R D SRB CoolStep N-Gate LB1 S S Energy G drivers N G N efficiency LB2 D D stallGuard SG_TST BACK D stallGuard 2 Break output EMF Phase polarity Chopper Short motor coil B before logic detectors BMB2 make Protection & SHORT TO BMB1 Diagnostics GND D D P P G P-Gate HB2 G S S ENABLE drivers Temp. sensor HB1 100°C, 120°C, 136°C, 150°C slope HS VHS +VM DIE PAD GND TST_MODE
Figure 3.1 TMC2590 block diagram and application schematic
Prominent features include: Oscillator and clock selector provides the system clock from the on-chip oscillator or an external source. Step and direction interface uses a microstep counter and sine table to generate target currents for the coils. SPI interface receives commands for configuration or commands that directly set the coil current values. Multiplexer selects either the output of the sine table or the SPI interface for controlling the current into the motor coils. Multipliers scales down the currents to both coils when the currents are greater than those required by the load on the motor or as set by the CS current scale parameter. DACs and comparators converts the digital current values to analog signals that are compared with the voltages on the sense resistors. Comparator outputs terminate chopper drive phases when target currents are reached. Break-before-make and gate drivers ensure non-overlapping pulses, boost drive voltage, and control pulse slope to the gates of the power MOSFETs. On-chip voltage regulators provide high-side voltage for P-channel MOSFET gate drivers and supply voltage for on-chip analog and digital circuits. www.trinamic.com
