Preliminary Datasheet P9415 (IDT) - 8
| Manufacturer | IDT |
| Description | Medium Power Wireless Transmitter/Receiver (TRx) |
| Pages / Page | 26 / 8 — Table 4. Device Characteristics (Continued). Symbol. Description. … |
| Revision | 20190829 |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
Table 4. Device Characteristics (Continued). Symbol. Description. Conditions. Min. Typ. Max. Units. Enable Input nEN
Model Line for this Datasheet
Text Version of Document
P9415 Preliminary Datasheet Electrical Characteristics Table VRECT = 5.5 V1, CLDO1P8_OUT = CLDO5P0_OUT = 2.2 μF, CMLDO_VOUT = 10 μF, nEN = 0 V, unless otherwise noted. TJ =-5C to 125C, Typical values are at 25°C.
Table 4. Device Characteristics (Continued) Symbol Description Conditions Min Typ Max Units Enable Input nEN
VIH Input Threshold High 1.5 V VIL Input Threshold Low 0.25 V InEN_LKG nEN Leakage Current VnEN = 0 V ± 1 μA VnEN = 5.0 V 2.5 μA
Open Drain Inputs/Outputs (SCL, SD, OD2, OD3, OD4)
VIH Input High Voltage 1.4 V VIL Input Low Voltage 0.5 V V = 0 V and 1.8 V; Digital or ADC I LKG Input Leakage Current ± 1 μA input mode. VOL Output Low Voltage IOL = 8 mA 0.36 V
Push-Pull General Purpose Inputs/Outputs (GP0, GP1, GP2, GP3, GP4, GP5, GP6)
VIH Input High Voltage 1.4 V VIL Input Low Voltage 0.5 V V = 0 V and 1.8 V; Digital or ADC I LKG Input Leakage Current ± 1 μA input mode. I V OH = 8 mA (for all combined OH Output High Voltage 1.44 V GPIOs) I V OL = 8 mA (for all combined OL Output Low Voltage 0.36 V GPIOs)
ECLAMP_DRV Output
VOH Output High Voltage IOH = 8 mA 4.9 V VOL Output Low Voltage IOL = 8 mA 0.36 V
SCL, SDA (I2C Interfaces SCL (OD0), SDA (OD1)
fSCL Clock Frequency 400 kHz Hold Time (Repeated) for tHD,STA 0.6 µs START Condition tHD:DAT Data Hold Time 0 ns tLOW Clock Low Period 1.3 µs tHIGH Clock High Period 0.6 µs Set-up Time for Repeated tSU:STA 0.6 µs START Condition Bus Free Time Between tBUF STOP and START 1.3 µs Condition CB Capacitive Load for Each 150 pF Bus Line CI SCL, SDA Input 5 pF © 2019 IDT A Renesas Company. 8 Revision 0.8 August 29, 2019
Table 4. Device Characteristics (Continued) Symbol Description Conditions Min Typ Max Units Enable Input nEN
VIH Input Threshold High 1.5 V VIL Input Threshold Low 0.25 V InEN_LKG nEN Leakage Current VnEN = 0 V ± 1 μA VnEN = 5.0 V 2.5 μA
Open Drain Inputs/Outputs (SCL, SD, OD2, OD3, OD4)
VIH Input High Voltage 1.4 V VIL Input Low Voltage 0.5 V V = 0 V and 1.8 V; Digital or ADC I LKG Input Leakage Current ± 1 μA input mode. VOL Output Low Voltage IOL = 8 mA 0.36 V
Push-Pull General Purpose Inputs/Outputs (GP0, GP1, GP2, GP3, GP4, GP5, GP6)
VIH Input High Voltage 1.4 V VIL Input Low Voltage 0.5 V V = 0 V and 1.8 V; Digital or ADC I LKG Input Leakage Current ± 1 μA input mode. I V OH = 8 mA (for all combined OH Output High Voltage 1.44 V GPIOs) I V OL = 8 mA (for all combined OL Output Low Voltage 0.36 V GPIOs)
ECLAMP_DRV Output
VOH Output High Voltage IOH = 8 mA 4.9 V VOL Output Low Voltage IOL = 8 mA 0.36 V
SCL, SDA (I2C Interfaces SCL (OD0), SDA (OD1)
fSCL Clock Frequency 400 kHz Hold Time (Repeated) for tHD,STA 0.6 µs START Condition tHD:DAT Data Hold Time 0 ns tLOW Clock Low Period 1.3 µs tHIGH Clock High Period 0.6 µs Set-up Time for Repeated tSU:STA 0.6 µs START Condition Bus Free Time Between tBUF STOP and START 1.3 µs Condition CB Capacitive Load for Each 150 pF Bus Line CI SCL, SDA Input 5 pF © 2019 IDT A Renesas Company. 8 Revision 0.8 August 29, 2019
