Datasheet DA9121 (Dialog Semiconductor) - 2
| Manufacturer | Dialog Semiconductor |
| Description | High-Performance, 10 A, Dual-Phase DC-DC Converter |
| Pages / Page | 47 / 2 — DA9121. High-Performance, 10 A, Dual-Phase DC-DC Converter. System … |
| File Format / Size | PDF / 1.4 Mb |
| Document Language | English |
DA9121. High-Performance, 10 A, Dual-Phase DC-DC Converter. System Diagrams
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Text Version of Document
DA9121 High-Performance, 10 A, Dual-Phase DC-DC Converter System Diagrams
DDR 1.1 V 1.8 V N N P 2 1 P N .0 N C C 2 1 P N .0 N 5 C C 2 1 P N .0 O 2 2 X X 1 1 5 V O X X 1 N N 1 O X X 1 5 V N N 1 B B L L B B L L B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD IC_EN PVDD .8 1 DA9122 AVDD DA9121 AVDD DA9121 V AVDD SoC VR_ AGND CONF AGND CONF AGND HOT GPIO 2 2 1 _ T 1 1 1 _ T 1 1 1 N P P G R O G P N R O G P N E L L P V H P L E V H P L E VR_CPU_HOT VR_GPU_HOT PG (DVS ready) CPU_LP GPU_EN GPU_LP IO_LP DDR_LP VR_DDR_HOT
Figure 1: Typical Application Diagram (Port Control)
DDR 1.1 V 1.8 V N N P 2 1 P N .0 C C 2 1 P N .0 N 5 C C 2 1 P N .0 O 2 2 X X 1 1 5 V X X 1 N N 1 O X X 1 5 V N N 1 B B L L B B L L B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD IC_EN PVDD .8 1 DA9122 AVDD DA9121 AVDD DA9121 V AVDD SoC CONF AGND CONF AGND CONF AGND Q A L Q 1 A L Q I2C GPIO 1 A L IR G D C IR G D C IR G D C n P S S n P S S n P S S I2C CLK I2C DATA Faults PG (ENx/DVS ready) GPU_EN
Figure 2: Typical Application Diagram (I2C Control)
VDD = 2.5 V to 5.5 V 1 µF 2x 10 µF PVDD1 FB1P 100 nH 100 nH VOUT1 = 0.3 V to 1.9 V Buck1 4 x 10 µF Digital Core PGND OTP Memory FB1N IC_EN Register Map
DA9121
CONF/GPIO0 GPIO1 Bias Supervision GPIO2 NC SCL/GPIO3 Oscillator SDA/GPIO4 I2C AG ND NC GPIO
Figure 3: Simplified Schematic Diagram Datasheet Revision 2.0 18-Jul-2019
CFR0011-120-00 2 of 47 © 2019 Dialog Semiconductor Document Outline General Description Key Features Applications System Diagrams Contents 1 Terms and Definitions 2 Pinout 3 Characteristics 3.1 Absolute Maximum Ratings 3.2 Recommended Operating Conditions 3.3 Thermal Characteristics 3.3.1 Thermal Ratings 3.3.2 Power Dissipation 3.4 ESD Characteristics 3.5 Buck Characteristics 3.6 Performance and Supervision Characteristics 3.7 Digital IO Characteristics 3.8 Timing Characteristics 3.9 Typical Performance 4 Functional Description 4.1 DC-DC Buck Converter 4.1.1 Switching Frequency 4.1.2 Operation Modes and Phase Selection 4.1.3 Output Voltage Selection 4.1.4 Soft Start-Up and Shutdown 4.1.5 Current Limit 4.1.6 Thermal Protection 4.2 Internal Circuits 4.2.1 IC_EN/Chip Enable/Disable 4.2.2 nIRQ/Interrupt 4.2.3 GPIO 4.2.3.1 GPIO Pin Assignment 4.2.3.2 GPIO Function 4.2.3.3 Chip Configuration Select (CONF) 4.3 Operating Modes 4.3.1 ON 4.3.2 OFF 4.4 I2C Communication 4.4.1 I2C Protocol 5 Register Definitions 5.1 Register Map 5.1.1 System 5.1.2 Buck1 5.1.3 Serialization 6 Package Information 6.1 Package Outlines 6.2 Moisture Sensitivity Level 6.3 WLCSP Handling 6.4 Soldering Information 7 Ordering Information 8 Application Information 8.1 Capacitor Selection 8.2 Inductor Selection
DDR 1.1 V 1.8 V N N P 2 1 P N .0 N C C 2 1 P N .0 N 5 C C 2 1 P N .0 O 2 2 X X 1 1 5 V O X X 1 N N 1 O X X 1 5 V N N 1 B B L L B B L L B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD IC_EN PVDD .8 1 DA9122 AVDD DA9121 AVDD DA9121 V AVDD SoC VR_ AGND CONF AGND CONF AGND HOT GPIO 2 2 1 _ T 1 1 1 _ T 1 1 1 N P P G R O G P N R O G P N E L L P V H P L E V H P L E VR_CPU_HOT VR_GPU_HOT PG (DVS ready) CPU_LP GPU_EN GPU_LP IO_LP DDR_LP VR_DDR_HOT
Figure 1: Typical Application Diagram (Port Control)
DDR 1.1 V 1.8 V N N P 2 1 P N .0 C C 2 1 P N .0 N 5 C C 2 1 P N .0 O 2 2 X X 1 1 5 V X X 1 N N 1 O X X 1 5 V N N 1 B B L L B B L L B B L L B B V F F F F F F F F CPU GPU IC_EN PVDD IC_EN PVDD IC_EN PVDD .8 1 DA9122 AVDD DA9121 AVDD DA9121 V AVDD SoC CONF AGND CONF AGND CONF AGND Q A L Q 1 A L Q I2C GPIO 1 A L IR G D C IR G D C IR G D C n P S S n P S S n P S S I2C CLK I2C DATA Faults PG (ENx/DVS ready) GPU_EN
Figure 2: Typical Application Diagram (I2C Control)
VDD = 2.5 V to 5.5 V 1 µF 2x 10 µF PVDD1 FB1P 100 nH 100 nH VOUT1 = 0.3 V to 1.9 V Buck1 4 x 10 µF Digital Core PGND OTP Memory FB1N IC_EN Register Map
DA9121
CONF/GPIO0 GPIO1 Bias Supervision GPIO2 NC SCL/GPIO3 Oscillator SDA/GPIO4 I2C AG ND NC GPIO
Figure 3: Simplified Schematic Diagram Datasheet Revision 2.0 18-Jul-2019
CFR0011-120-00 2 of 47 © 2019 Dialog Semiconductor Document Outline General Description Key Features Applications System Diagrams Contents 1 Terms and Definitions 2 Pinout 3 Characteristics 3.1 Absolute Maximum Ratings 3.2 Recommended Operating Conditions 3.3 Thermal Characteristics 3.3.1 Thermal Ratings 3.3.2 Power Dissipation 3.4 ESD Characteristics 3.5 Buck Characteristics 3.6 Performance and Supervision Characteristics 3.7 Digital IO Characteristics 3.8 Timing Characteristics 3.9 Typical Performance 4 Functional Description 4.1 DC-DC Buck Converter 4.1.1 Switching Frequency 4.1.2 Operation Modes and Phase Selection 4.1.3 Output Voltage Selection 4.1.4 Soft Start-Up and Shutdown 4.1.5 Current Limit 4.1.6 Thermal Protection 4.2 Internal Circuits 4.2.1 IC_EN/Chip Enable/Disable 4.2.2 nIRQ/Interrupt 4.2.3 GPIO 4.2.3.1 GPIO Pin Assignment 4.2.3.2 GPIO Function 4.2.3.3 Chip Configuration Select (CONF) 4.3 Operating Modes 4.3.1 ON 4.3.2 OFF 4.4 I2C Communication 4.4.1 I2C Protocol 5 Register Definitions 5.1 Register Map 5.1.1 System 5.1.2 Buck1 5.1.3 Serialization 6 Package Information 6.1 Package Outlines 6.2 Moisture Sensitivity Level 6.3 WLCSP Handling 6.4 Soldering Information 7 Ordering Information 8 Application Information 8.1 Capacitor Selection 8.2 Inductor Selection
