Datasheet AD7741 (Analog Devices) - 8

ManufacturerAnalog Devices
DescriptionSingle and Multichannel, Synchronous Voltage-to-Frequency Converters
Pages / Page13 / 8 — AD7741. Table II. AD7741/AD7742 Input Range Selection. VIN(Min). …
RevisionA
File Format / SizePDF / 238 Kb
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AD7741. Table II. AD7741/AD7742 Input Range Selection. VIN(Min). VIN(Max). UNI/BIP. GAIN. Gain, G. fOUT = 0.05 fCLKIN

AD7741 Table II AD7741/AD7742 Input Range Selection VIN(Min) VIN(Max) UNI/BIP GAIN Gain, G fOUT = 0.05 fCLKIN

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AD7741 Table II. AD7741/AD7742 Input Range Selection VIN(Min) VIN(Max) UNI/BIP GAIN Gain, G fOUT = 0.05 fCLKIN fOUT = 0.45 fCLKIN Part
N/A N/A X1 0 +VREF AD7741 0 0 X1 –VREF +VREF AD7742 0 1 X2 –VREF/2 +VREF/2 AD7742 1 0 X1 0 +VREF AD7742 1 1 X2 0 +VREF/2 AD7742 As can be seen from Table II, the AD7741 has one input range
OUTPUT FREQUENCY
configuration whereas the AD7742 has unipolar/bipolar as
fOUT
well as gain options depending on the status of the GAIN and UNI/BIP pins.
fOUTMAX
The transfer function for the AD7741 is shown in Figure 3.
(0.45 fCLKIN)
Figure 4 shows the AD7742 transfer function for unipolar input range configuration while the AD7742 transfer function for bipolar input range configuration is shown in Figure 5.
fOUTMIN OUTPUT FREQUENCY (0.05 fCLKIN) fOUT V V REF REF DIFFERENTIAL + INPUT VOLTAGE GAIN GAIN fOUTMAX (0.45 fCLKIN)
Figure 5. AD7742 Transfer Characteristic for Bipolar Differential Input Range: –VREF/Gain to +VREF/Gain; the common-mode range must be between +0.5 V and VDD – 1.75 V. UNI/BIP pin tied to GND.
VFC Modulator fOUTMIN
The analog input signal to the AD7741/AD7742 is continu-
(0.05 fCLKIN)
ously sampled by a switched capacitor modulator whose sam-
0 REFIN INPUT VOLTAGE V
pling rate is set by a master clock input that may be supplied
IN
externally or by a crystal-controlled on-chip clock oscillator. Figure 3. AD7741 Transfer Characteristic for Input Range However, the input signal is buffered on-chip before being ap- from 0 to VREF plied to the sampling capacitor of the modulator. This isolates the sampling capacitor charging currents from the analog input
OUTPUT FREQUENCY
pins.
fOUT
This system is a negative feedback loop that tries to keep the net charge on the integrator capacitor at zero, by balancing charge
fOUTMAX (0.45 f
injected by the input voltage with charge injected by the V
CLKIN)
REF. The output of the comparator provides the digital input for the 1-bit DAC, so that the system functions as a negative feedback loop that tries to minimize the difference signal (see Figure 6).
CLK fOUTMIN INTEGRATOR (0.05 fCLKIN) COMPARATOR 0 V + REF DIFFERENTIAL 1-BIT + INPUT

+ STREAM GAIN INPUT VOLTAGE
Figure 4. AD7742 Transfer Characteristic for Unipolar

Differential Input Range: 0 V to V
+VREF
REF/Gain; the input common-mode range must be between +0.5 V and V
–V
DD – 1.75 V. UNI/BIP pin tied to VDD.
REF
Figure 6. AD7741/AD7742 Modulator Loop –8– REV. A