link to page 4 AD8128Data SheetABSOLUTE MAXIMUM RATINGS The power dissipated in the package (PD) is the sum of the Table 2. quiescent power dissipation and the power dissipated in the ParameterRating package due to the load drive for the output. The quiescent power Supply Voltage ±5.5 V is the voltage between the supply pins (VS) times the quiescent Input Voltage ±VS current (IS). The power dissipated due to the load drive depends VPEAK and VGAIN Control Pins −3 V to +VS upon the particular application. For each output, the power due VOFFSET Control Pins ±VS to load drive is calculated by multiplying the load current by the Operating Temperature Range −40°C to +85°C associated voltage drop across the Storage Temperature Range −65°C to +125°C Airflow increases heat dissipation, effectively reducing θ Lead Temperature (Soldering 10 sec) 300°C JA. Also, more metal directly in contact with the package leads from metal Junction Temperature 150°C traces, through-holes, ground, and power planes reduces the θJA. The exposed pad on the underside of the package must be Stresses at or above those listed under Absolute Maximum soldered to a pad on the PCB surface, which is thermal y connected Ratings may cause permanent damage to the product. This is a to a copper plane to achieve the specified θ stress rating only; functional operation of the product at these JA. or any other conditions above those indicated in the operational Figure 2 shows the maximum safe power dissipation in the package section of this specification is not implied. Operation beyond vs. the ambient temperature for the 8-lead LFCSP (48.5°C/W) on a the maximum operating conditions for extended periods may JEDEC standard 4-layer board with the underside pad soldered to a affect product reliability. pad that is thermal y connected to a PCB plane. Extra thermal relief is required for operation at high supply voltages. THERMAL RESISTANCE3.0 θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. (W) 2.5Table 3. Thermal ResistanceTION 2.0Package TypeθPAJAθJCUnitISSI 8-Lead LFCSP 77 14 °C/W D 1.5ER WMaximum Power DissipationM PO 1.0 The maximum safe power dissipation in the AD8128 package is MU XI limited by the associated rise in junction temperature (TJ) on the MA 0.5 die. At approximately 150°C, which is the glass transition temp- 020 erature, the plastic changes the properties. Even temporarily 0 05699- –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 exceeding this temperature limit can change the stresses that the AMBIENT TEMPERATURE (°C) package exerts on the die, permanently shifting the parametric Figure 2. Maximum Power Dissipation vs. Temperature performance of the AD8128. Exceeding a junction temperature ESD CAUTION of 150°C for an extended period can result in changes in the silicon devices potentially causing failure. Rev. A | Page 4 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT THEORY OF OPERATION INPUT COMMON-MODE VOLTAGE RANGE CONSIDERATIONS APPLICATIONS INFORMATION KVM APPLICATIONS DC CONTROL PINS CASCADED APPLICATIONS EXPOSED PAD (EP) LAYOUT AND POWER SUPPLY DECOUPLING CONSIDERATIONS EVALUATION BOARDS OUTLINE DIMENSIONS ORDERING GUIDE