Datasheet 24C01C (Microchip) - 5

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24C01C 2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE 8-pin 8-pin 8-pin 8-pin 8-pin Name SOT-23 Function PDIP SOIC TSSOP MSOP DFN/TDFN
A0 1 1 1 1 1 5 Chip Select A1 2 2 2 2 2 4 Chip Select A2 3 3 3 3 3 — Chip Select VSS 4 4 4 4 4 2 Ground SDA 5 5 5 5 5 3 Serial Data SCL 6 6 6 6 6 1 Serial Clock Test 7 7 7 7 7 — Test VCC 8 8 8 8 8 6 +4.5V to 5.5V Power Supply
2.1 SDA Serial Data 2.5 Noise Protection
This is a bidirectional pin used to transfer addresses The 24C01C employs a VCC threshold detector circuit and data into and data out of the device. It is an open which disables the internal erase/write logic if the VCC drain terminal; therefore, the SDA bus requires a pull- is below 3.8 volts at nominal conditions. up resistor to VCC (typical 10 k for 100 kHz, 2 k for The SCL and SDA inputs have Schmitt Trigger and 400 kHz). filter circuits which suppress noise spikes to assure For normal data transfer SDA is allowed to change only proper device operation even on a noisy bus. during SCL low. Changes during SCL high are reserved for indicating the Start and Stop conditions.
2.2 SCL Serial Clock
This input is used to synchronize the data transfer from and to the device.
2.3 A0, A1, A2
The levels on these inputs are compared with the corresponding bits in the slave address. The chip is selected if the compare is true. Up to eight 24C01C devices may be connected to the same bus by using different Chip Select bit combina- tions. These inputs must be connected to either VCC or VSS. For the SOT-23 devices up to four devices may be con- nected to the same bus using different Chip Select bit combinations. In most applications, the chip address inputs A0, A1 and A2 are hard-wired to logic ‘0’ or logic ‘1’. For applications in which these pins are controlled by a microcontroller or other programmable device, the chip address pins must be driven to logic ‘0’ or logic ‘1’ before normal device operation can proceed.
2.4 Test
This pin is utilized for testing purposes only. It may be tied high, tied low or left floating.  1997-2012 Microchip Technology Inc. DS21201K-page 5 Document Outline 24C01C Features: Description: Block Diagram Package Types 1.0 Electrical Characteristics Absolute Maximum Ratings(†) TABLE 1-1: DC Characteristics TABLE 1-2: AC Characteristics FIGURE 1-1: Bus Timing Data 2.0 Pin Descriptions TABLE 2-1: Pin Function Table 2.1 SDA Serial Data 2.2 SCL Serial Clock 2.3 A0, A1, A2 2.4 Test 2.5 Noise Protection 3.0 Functional Description 4.0 Bus Characteristics 4.1 Bus Not Busy (A) 4.2 Start Data Transfer (B) 4.3 Stop Data Transfer (C) 4.4 Data Valid (D) 4.5 Acknowledge FIGURE 4-1: Data Transfer Sequence on the Serial Bus FIGURE 4-2: Acknowledge Timing 5.0 Device Addressing FIGURE 5-1: Control Byte Format 5.1 Contiguous Addressing Across Multiple Devices 6.0 Write Operations 6.1 Byte Write 6.2 Page Write FIGURE 6-1: Byte Write FIGURE 6-2: Page Write 7.0 Acknowledge Polling FIGURE 7-1: Acknowledge Polling Flow 8.0 Read Operation 8.1 Current Address Read FIGURE 8-1: Current Address Read 8.2 Random Read 8.3 Sequential Read FIGURE 8-2: Random Read FIGURE 8-3: Sequential Read 9.0 Packaging Information 9.1 Package Marking Information Appendix A: Revision History The Microchip Web Site Customer Change Notification Service Customer Support Reader Response Product Identification System Trademarks Worldwide Sales