Product Brief PIC16(L)F191XX (Microchip)

PIC16(L)F191XX LCD Control with Core Independent Peripherals, 28/40/48/64-Pin Microcontroller Product Brief Description:
PIC16(L)F191XX microcontrollers offer eXtreme Low-Power (XLP) LCD drive coupled with Core Independent Peripherals and Intelligent Analog. They are especially suited for battery powered LCD applications due to an integrated charge pump, high current I/O drive for backlighting, and battery backup of the Real Time Clock/Calendar (RTCC). Active clock tuning of the HFINTOSC provides a highly accurate clock source over voltage and temperature. The family also features new 12-bit ADC2 automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and automatic threshold comparison. Other new features include low-power IDLE and DOZE modes, Device Information Area (DIA), and Memory Access Partition (MAP). These low-power products will be offered in a broad range of pin counts from 28- to 64-pins to support the customer in various LCD and general purpose applications.
Core Features: Operating Characteristics:
• C Compiler Optimized RISC Architecture • Operating Voltage Range: • Only 49 Instructions - 1.8V to 3.6V (PIC16LF191XX) • Operating Speed: - 2.3V to 5.5V (PIC16F191XX) - DC – 32 MHz clock input • Temperature Range: - 125 ns minimum instruction cycle - Industrial: -40°C to 85°C • Interrupt Capability - Extended: -40°C to 125°C • 16-Level Deep Hardware Stack • Timers:
Power-Saving Functionality:
- Two 8-bit (TMR2) with Hardware Limit Timer (HLT) Extension •
DOZE mode
: Ability to run CPU core slower than - 16-bit (TMR0/1) the system clock • Low-Current Power-on Reset (POR) •
IDLE mode
: Ability to halt CPU core while internal • Configurable Power-up Timer (PWRTE) peripherals continue operating • Brown-out Reset (BOR) with Fast Recovery •
Sleep mode
: Lowest power consumption • Low-Power BOR (LPBOR) Option •
Peripheral Module Disable (PMD)
: Ability to • Windowed Watchdog Timer (WWDT): disable hardware module to minimize power - Variable prescaler selection consumption of unused peripherals - Variable window size selection - Al sources configurable in hardware or
eXtreme Low-Power (XLP) Features:
software • Programmable Code Protection • Sleep mode: 50 nA @ 1.8V, typical • Watchdog Timer: 500 nA @ 1.8V, typical • Secondary Oscillator: 500 nA @ 32 kHz
Memory:
• Operating Current: • Up to 56 KB Flash Program Memory - 8 µA @ 32 kHz, 1.8V, typical • Up to 4 KB Data SRAM Memory - 32 µA/MHz @ 1.8V, typical • 256 Bytes DataEE • Direct, Indirect and Relative Addressing modes
Digital Peripherals:
• Memory Access Partition (MAP): - Right protect • LCD Controller: - Custom Partition - Up to 360 segments • Device Information Area (DIA) - Charge pump for low-voltage/current operation - Contrast control • Four Configurable Logic Cel (CLC): - Integrated combinational and sequential logic  2016 Microchip Technology Inc. DS40001863A-page 1 Document Outline Description: Core Features: Memory: Operating Characteristics: Power-Saving Functionality: eXtreme Low-Power (XLP) Features: Digital Peripherals: Analog Peripherals: Flexible Oscillator Structure: TABLE 1: PIC16(L)F191XX Family Types TABLE 2: Packages Pin Diagrams FIGURE 1: 28-Pin SSOP, SPDIP and SOIC package Diagram for PIC16(L)F19155/56 FIGURE 2: 28-Pin UQFN Package Diagram For PIC16(L)F19155/56 FIGURE 3: 40-Pin PDIP Package Diagram For PIC16(L)F19175/76 FIGURE 4: 40-Pin UQFN (5x5X0.5) Package Diagram For PIC16(L)F19175/76 FIGURE 5: 44-Pin TQFP package Diagram for PIC16(L)F19175/76 FIGURE 6: 44-Pin QFN (8x8X0.9) Package Diagram For PIC16(L)F19175/76 FIGURE 7: 48-Pin TQFP/UQFN package Diagram for PIC16(L)F19185/86 FIGURE 8: 64-Pin TQFP/QFN package Diagram for PIC16(L)F19195/96/97 TABLE 3: 28-Pin Allocation Table (PIC16(L)F19155/56) TABLE 4: 40/44-Pin Allocation Table (PIC16(L)F19175/76) TABLE 5: 48-Pin Allocation Table (PIC16(L)F19185/86) TABLE 6: 64-Pin Allocation Table (PIC16(L)F19195/96/97) Trademarks Worldwide Sales