Datasheet PIC16F18325/18345 (Microchip)

ManufacturerMicrochip
DescriptionFull-Featured, Low Pin Count, High-Temperature Microcontrollers
Pages / Page18 / 1 — PIC16F18325/18345. Full-Featured, Low Pin Count, High-Temperature …
File Format / SizePDF / 324 Kb
Document LanguageEnglish

PIC16F18325/18345. Full-Featured, Low Pin Count, High-Temperature Microcontrollers. Description. Core Features

Datasheet PIC16F18325/18345 Microchip

Model Line for this Datasheet

PIC16F18325
PIC16F18345

Text Version of Document

PIC16F18325/18345 Full-Featured, Low Pin Count, High-Temperature Microcontrollers Description
PIC16(L)F18325/18345 high-temperature microcontrollers feature Intelligent Analog, Core Independent Peripherals (CIPs) and Communication Peripherals, combined with an extended temperature range for a variety of general purpose applications. The Peripheral Pin Select (PPS) functionality enables pin mapping when using the digital peripherals Configurable Logic Cell (CLC), Complementary Waveform Generator (CWG), Capture/Compare/PWM (CCP), Pulse- Width Modulation (PWM), and communications to add flexibility to the application design.
Core Features Power-Saving Functionality
• C Compiler Optimized RISC Architecture • IDLE mode: ability to put the CPU core to Sleep • Only 48 Instructions from the system clock, while internal peripherals • Operating Speed: continue operating - DC – 32 MHz clock input • DOZE mode: ability to run the CPU core slower - 125 ns minimum instruction cycle than the system clock used by the internal • Interrupt Capability peripherals • 16-Level Deep Hardware Stack • SLEEP mode: lowest power consumption • Up to Four 8-Bit Timers • Peripheral Module Disable (PMD): peripheral • Up to Three 16-Bit Timers power disable hardware module to minimize • Low-Current Power-on Reset (POR) power consumption of unused peripherals • Power-up Timer (PWRT) • Brown-out Reset (BOR) • Low-Power BOR (LPBOR) Option
Digital Peripherals
• Extended Watchdog Timer (WDT) with Dedicated • Configurable Logic Cell (CLC): On-Chip Oscil ator for Reliable Operation • Programmable Code Protection - Four CLCs - Integrated combinational and sequential logic
Memory
• Complementary Waveform Generator (CWG): - Two CWGs • 14 Kbytes Program Flash Memory - Rising and falling edge dead-band control • 1 KB Data SRAM Memory - Full-bridge, half-bridge, 1-channel drive • 256B of EEPROM - Multiple signal sources • Direct, Indirect and Relative Addressing modes • Capture/Compare/PWM (CCP) modules:
Operating Characteristics
- Four CCPs - 16-bit resolution for Capture/Compare modes • Operating Voltage Range: - 10-bit resolution for PWM mode - 2.3V to 5.5V(PIC16F18325/18345) • Pulse-Width Modulators (PWM) • Temperature Range: - Two 10-bit PWMs - High-Temp: -40°C to 150°C • Numerically Controlled Oscillator (NCO): - Precision linear frequency generator (@50% duty cycle) with 0.0001% step size of source input clock - Input clock: 0 Hz < FNCO < 32 MHz - Resolution: FNCO/220  2018 Microchip Technology Inc. DS40002024B-page 1 Document Outline PIC16F18325/18345 Family Types Table of Contents 1.0 Device Overview 2.0 Device/Revision ID Registers Register 2-1: DEVID: Device ID Register Register 2-2: REVID: Revision ID Register 2 3.0 Electrical Characteristics TABLE 3-1: Supply Voltage (High Temperature) FIGURE 3-1: Voltage-Frequency Graph, -40°C £ Ta £ +150°C TABLE 3-2: DC Characteristics: Supply Current (1,2) TABLE 3-3: DC Characteristics: Power-Down Currents (IPD)(1,2,3) TABLE 3-4: Internal Oscillator Parameters(1) FIGURE 3-2: Precision-Calibrated HFINTOSC Frequency Accuracy Over Device Vdd and Temperature TABLE 3-5: Reset, Watchdog Timer, Oscillator Start-up Timer, Power-up Timer, Brown-out Timer and Low-Power Brown-out Reset Specifications Appendix A: Revision History The Microchip WebSite Customer Change Notification Service Customer Support Product Identification System Trademarks Worldwide Sales