Datasheet PIC18(L)F2X/4X/5XK42 (Microchip) - 2
| Manufacturer | Microchip |
| Description | Highly Integrated 8-Bit PIC Microcontrollers in 28-to 48-Pins |
| Pages / Page | 18 / 2 — PIC18(L)F2X/4X/5XK42. Digital Peripherals (Continued). Analog … |
| File Format / Size | PDF / 208 Kb |
| Document Language | English |
PIC18(L)F2X/4X/5XK42. Digital Peripherals (Continued). Analog Peripherals. Flexible Oscillator Structure. Advance Information
Model Line for this Datasheet
- PIC18F27K42-E/ML PIC18F27K42-E/MLVAO PIC18F27K42-E/MX PIC18F27K42-E/SO PIC18F27K42-E/SP PIC18F27K42-E/SS PIC18F27K42-I/ML PIC18F27K42-I/MX PIC18F27K42-I/SO PIC18F27K42-I/SP PIC18F27K42-I/SS PIC18F27K42T-E/ML PIC18F27K42T-E/MLVAO PIC18F27K42T-I/ML PIC18F27K42T-I/MX PIC18F27K42T-I/SO PIC18F27K42T-I/SS PIC18LF27K42-E/ML PIC18LF27K42-E/MX PIC18LF27K42-E/SO PIC18LF27K42-E/SP PIC18LF27K42-E/SS PIC18LF27K42-I/ML PIC18LF27K42-I/MX PIC18LF27K42-I/SO PIC18LF27K42-I/SP PIC18LF27K42-I/SS PIC18LF27K42T-E/ML PIC18LF27K42T-I/ML PIC18LF27K42T-I/MX PIC18LF27K42T-I/SO PIC18LF27K42T-I/SS
- PIC18F45K42-E/ML PIC18F45K42-E/MV PIC18F45K42-E/P PIC18F45K42-E/PT PIC18F45K42-I/ML PIC18F45K42-I/MV PIC18F45K42-I/P PIC18F45K42-I/PT PIC18F45K42T-I/ML PIC18F45K42T-I/MV PIC18F45K42T-I/MVVAO PIC18F45K42T-I/PT PIC18LF45K42-E/ML PIC18LF45K42-E/MV PIC18LF45K42-E/P PIC18LF45K42-E/PT PIC18LF45K42-I/ML PIC18LF45K42-I/MV PIC18LF45K42-I/P PIC18LF45K42-I/PT PIC18LF45K42T-I/ML PIC18LF45K42T-I/MV PIC18LF45K42T-I/PT
- PIC18F46K42-E/ML PIC18F46K42-E/MV PIC18F46K42-E/MVVAO PIC18F46K42-E/P PIC18F46K42-E/PT PIC18F46K42-I/ML PIC18F46K42-I/MV PIC18F46K42-I/P PIC18F46K42-I/PT PIC18F46K42T-I/ML PIC18F46K42T-I/MV PIC18F46K42T-I/PT PIC18LF46K42-E/ML PIC18LF46K42-E/MV PIC18LF46K42-E/P PIC18LF46K42-E/PT PIC18LF46K42-I/ML PIC18LF46K42-I/MV PIC18LF46K42-I/P PIC18LF46K42-I/PT PIC18LF46K42T-I/ML PIC18LF46K42T-I/MV PIC18LF46K42T-I/PT
- PIC18F47K42-E/ML PIC18F47K42-E/MV PIC18F47K42-E/P PIC18F47K42-E/PT PIC18F47K42-I/ML PIC18F47K42-I/MV PIC18F47K42-I/P PIC18F47K42-I/PT PIC18F47K42T-I/ML PIC18F47K42T-I/MV PIC18F47K42T-I/PT PIC18LF47K42-E/ML PIC18LF47K42-E/MV PIC18LF47K42-E/P PIC18LF47K42-E/PT PIC18LF47K42-I/ML PIC18LF47K42-I/MV PIC18LF47K42-I/P PIC18LF47K42-I/PT PIC18LF47K42T-I/ML PIC18LF47K42T-I/MV PIC18LF47K42T-I/PT
- PIC18F55K42-E/MV PIC18F55K42-E/PT PIC18F55K42-I/MV PIC18F55K42-I/PT PIC18F55K42T-E/MV PIC18F55K42T-I/MV PIC18F55K42T-I/PT PIC18LF55K42-E/MV PIC18LF55K42-E/PT PIC18LF55K42-I/MV PIC18LF55K42-I/PT PIC18LF55K42-I/PTC01 PIC18LF55K42T-I/MV PIC18LF55K42T-I/PT PIC18LF55K42T-I/PTC01
Text Version of Document
PIC18(L)F2X/4X/5XK42 Digital Peripherals (Continued)
• Signal Measurement Timer (SMT): - 24-bit timer/counter with prescaler • Numerically Controlled Oscillator (NCO): - Generates true linear frequency control and
Analog Peripherals
increased frequency resolution - Input Clock: 0 Hz < fNCO < 64 MHz • Analog-to-Digital Converter with Computation - Resolution: fNCO/220 (ADC2): • DSM: Data Signal Modulator: - 12-bit with up to 43 external channels - Multiplex two carrier clocks, with glitch - Automated post-processing prevention feature - Automates math functions on input signals: - Multiple sources for each carrier averaging, filter calculations, oversampling • Programmable CRC with Memory Scan: and threshold comparison - Reliable data/program memory monitoring for - Operates in Sleep fail-safe operation (e.g., Class B) - Temperature Sensor - Calculate CRC over any portion of Flash - Internal connection to ADC • Two UART Modules: - Can be calibrated for improved accuracy - Asynchronous UART, RS-232, RS-485 com- - Hardware Capacitive Voltage Divider (CVD): patible. - Automates touch sampling and reduces - One of the UART modules supports LIN mas- software size and CPU usage when touch ter and slave, DMX mode, DALI gear and or proximity sensing is required device protocols - Adjustable sample and hold capacitor array - Automatic and user timed BREAK period - Two guard ring output drives generation • Two Comparators: - DMA compatible - Comparator Hysteresis enable - Automatic checksums - Programmable 1, 1.5, and 2 Stop bits - Invert output polarity - Wake-up on BREAK reception - Comparator outputs externally accessible • One SPI module: • 5-Bit Digital-to-Analog Converter (DAC): - Configurable length bytes - 5-bit resolution, rail-to-rail - Arbitrary length data packets - Unbuffered I/O pin output - Receive-without-transmit option - Internal connections to ADCs and compara- - Transmit-without-receive option tors - Transfer byte counter • Voltage Reference: - Separate transmit and receive buffers with - Fixed Voltage Reference with 1.024V, 2.048V 2-byte FIFO and DMA capabilities and 4.096V output levels • Two I2C modules, SMBus, PMBus™ compatible: - Connection to ADC, Comp and DAC - Dedicated address, transmit and receive buffers
Flexible Oscillator Structure
- Bus collision detection with arbitration • High-Precision Internal Oscillator: - Bus time-out detection and handling - Selectable frequency range up to 64 MHz - I2C, SMBus 2.0 and SMBus 3.0, and 1.8V - Safe clock switching while running input level selections - ±1% at calibration (nominal) - Multi-Master mode, including self-addressing • Low-Power Internal 32 kHz Oscillator • Device I/O Port Features: (LFINTOSC) - 25 I/O pins (PIC18(L)F24/25/26/27K42) • External 32 kHz Crystal Oscillator - 36 I/O pins (PIC18(L)F45/46/47K42) • External Oscillator Block with: - 44 I/O pins (PIC18(L)F55/56/57K42) - x4 PLL with external sources - One input-only pin - Three crystal/resonator modes up to 20 MHz - Individually programmable I/O direction, - Three external clock modes up to 20 MHz controlled current, open-drain, slew rate, weak pull-up control • Fail-Safe Clock Monitor - Interrupt-on-change - Allows for safe shutdown if peripherals clock - Three external interrupt pins stops • Peripheral Pin Select (PPS): • Oscillator Start-up Timer (OST) - Enables pin mapping of digital I/O - Ensures stability of crystal oscillator sources DS40001861B-page 2
Advance Information
2016 Microchip Technology Inc. Document Outline Description Core Features Memory Operating Characteristics Power-Saving Functionality eXtreme Low-Power (XLP) Features Digital Peripherals Digital Peripherals (Continued) Analog Peripherals Flexible Oscillator Structure TABLE 1: PIC18(L)F2X/4X/5XK42 Family Types TABLE 2: Packages FIGURE 1: 28-Pin SPDIP, SOIC, SSOP for PIC18(L)F2XK42 FIGURE 2: 28-Pin UQFN (4x4) for PIC18(L)F2XK42 FIGURE 3: 28-Pin QFN (6x6x0.9 mm) for PIC18(L)F2XK42 FIGURE 4: 40-Pin PDIP for PIC18(L)F4XK42 FIGURE 5: 40-Pin UQFN (5x5x0.5 mm) for PIC18(L)F4XK42 FIGURE 6: 44-Pin QFN (8x8x0.9 mm) for PIC18(L)F5XK42 FIGURE 7: 44-Pin TQFP For PIC18(L)F4XK42 FIGURE 8: 48-Pin TQFP/UQFN for PIC18(L)F5XK42 TABLE 3: 28-Pin Allocation Table (PIC18(L)F2XK42) TABLE 4: 40/44-Pin Allocation Table For PIC18(L)F4XK42, PIC18(L)F5XK42 TABLE 5: 48-Pin Allocation Table for PIC18(L)F5XK42 Trademarks Worldwide Sales
• Signal Measurement Timer (SMT): - 24-bit timer/counter with prescaler • Numerically Controlled Oscillator (NCO): - Generates true linear frequency control and
Analog Peripherals
increased frequency resolution - Input Clock: 0 Hz < fNCO < 64 MHz • Analog-to-Digital Converter with Computation - Resolution: fNCO/220 (ADC2): • DSM: Data Signal Modulator: - 12-bit with up to 43 external channels - Multiplex two carrier clocks, with glitch - Automated post-processing prevention feature - Automates math functions on input signals: - Multiple sources for each carrier averaging, filter calculations, oversampling • Programmable CRC with Memory Scan: and threshold comparison - Reliable data/program memory monitoring for - Operates in Sleep fail-safe operation (e.g., Class B) - Temperature Sensor - Calculate CRC over any portion of Flash - Internal connection to ADC • Two UART Modules: - Can be calibrated for improved accuracy - Asynchronous UART, RS-232, RS-485 com- - Hardware Capacitive Voltage Divider (CVD): patible. - Automates touch sampling and reduces - One of the UART modules supports LIN mas- software size and CPU usage when touch ter and slave, DMX mode, DALI gear and or proximity sensing is required device protocols - Adjustable sample and hold capacitor array - Automatic and user timed BREAK period - Two guard ring output drives generation • Two Comparators: - DMA compatible - Comparator Hysteresis enable - Automatic checksums - Programmable 1, 1.5, and 2 Stop bits - Invert output polarity - Wake-up on BREAK reception - Comparator outputs externally accessible • One SPI module: • 5-Bit Digital-to-Analog Converter (DAC): - Configurable length bytes - 5-bit resolution, rail-to-rail - Arbitrary length data packets - Unbuffered I/O pin output - Receive-without-transmit option - Internal connections to ADCs and compara- - Transmit-without-receive option tors - Transfer byte counter • Voltage Reference: - Separate transmit and receive buffers with - Fixed Voltage Reference with 1.024V, 2.048V 2-byte FIFO and DMA capabilities and 4.096V output levels • Two I2C modules, SMBus, PMBus™ compatible: - Connection to ADC, Comp and DAC - Dedicated address, transmit and receive buffers
Flexible Oscillator Structure
- Bus collision detection with arbitration • High-Precision Internal Oscillator: - Bus time-out detection and handling - Selectable frequency range up to 64 MHz - I2C, SMBus 2.0 and SMBus 3.0, and 1.8V - Safe clock switching while running input level selections - ±1% at calibration (nominal) - Multi-Master mode, including self-addressing • Low-Power Internal 32 kHz Oscillator • Device I/O Port Features: (LFINTOSC) - 25 I/O pins (PIC18(L)F24/25/26/27K42) • External 32 kHz Crystal Oscillator - 36 I/O pins (PIC18(L)F45/46/47K42) • External Oscillator Block with: - 44 I/O pins (PIC18(L)F55/56/57K42) - x4 PLL with external sources - One input-only pin - Three crystal/resonator modes up to 20 MHz - Individually programmable I/O direction, - Three external clock modes up to 20 MHz controlled current, open-drain, slew rate, weak pull-up control • Fail-Safe Clock Monitor - Interrupt-on-change - Allows for safe shutdown if peripherals clock - Three external interrupt pins stops • Peripheral Pin Select (PPS): • Oscillator Start-up Timer (OST) - Enables pin mapping of digital I/O - Ensures stability of crystal oscillator sources DS40001861B-page 2
Advance Information
2016 Microchip Technology Inc. Document Outline Description Core Features Memory Operating Characteristics Power-Saving Functionality eXtreme Low-Power (XLP) Features Digital Peripherals Digital Peripherals (Continued) Analog Peripherals Flexible Oscillator Structure TABLE 1: PIC18(L)F2X/4X/5XK42 Family Types TABLE 2: Packages FIGURE 1: 28-Pin SPDIP, SOIC, SSOP for PIC18(L)F2XK42 FIGURE 2: 28-Pin UQFN (4x4) for PIC18(L)F2XK42 FIGURE 3: 28-Pin QFN (6x6x0.9 mm) for PIC18(L)F2XK42 FIGURE 4: 40-Pin PDIP for PIC18(L)F4XK42 FIGURE 5: 40-Pin UQFN (5x5x0.5 mm) for PIC18(L)F4XK42 FIGURE 6: 44-Pin QFN (8x8x0.9 mm) for PIC18(L)F5XK42 FIGURE 7: 44-Pin TQFP For PIC18(L)F4XK42 FIGURE 8: 48-Pin TQFP/UQFN for PIC18(L)F5XK42 TABLE 3: 28-Pin Allocation Table (PIC18(L)F2XK42) TABLE 4: 40/44-Pin Allocation Table For PIC18(L)F4XK42, PIC18(L)F5XK42 TABLE 5: 48-Pin Allocation Table for PIC18(L)F5XK42 Trademarks Worldwide Sales
